The EDA tools and skills will you need for 45nm IC design--which EDA vendors are ready and which ones are not?

Good point, CYI, I'm sure 300mm wasn't easy. I don't know which vendor's router is the one that is reportedly aging--the foundry spokesperson didn't tell me?thus the guessing game explained in my previous post ?Cooley, Dini, Synplicity; and IC router benchmark tomfoolery?? Actually, in speaking to the foundries, it looks like Magma has a lot of the 45nm flow already in place. Heck, it could be Cadence?s router that is having the problem for all I know at this point?.It?ll be interesting to see if Cooley finds anything more (could it come back to haunt Cadence? What if the results are valid?) As for the future of SSTA startups, Cadence just this week announced it developed one of its own, Synopsys already has one, Magma claims to already have one. So, of the big vendors, that only leaves Mentor needing (?) an SSTA tool. And today there are a few startups that offer SSTA tools?some tools are for digital and some for analog. I guess the big question is what's going to be the digital signoff timer? As you probably know, traditionally the entire design industry (not only IC designers but most IDMs, foundries, and even the EDA industry) has backed a single timing engine. In my reporting lifetime, Quad's Motive was the first industry de facto signoff timer and Synopsys replaced it after acquiring Viewlogic with Primetime. At last reports from Gary Smith, Synopsys had some hefty share and I'm sure has made some cake from Primetime tool sales over the years. (Maybe if Gary Smith reads this, he can give us the latest numbers???) So, is there a need for a single signoff timer (STA or SSTA) at the 45nm node or is it just fine if every vendor has their own timer? Will the foundries support multiple timers? I don't know the technical pluses and minuses of this part of the biz. If you, CYI, or any readers do, please share???

Mike, very nice article. At 130nm, in addition to copper and low-K, they also introduced 300mm wafers - talk about a triple whammy! If I interpreted your previous blog entry about IC routers correctly, it sounds as if Magma's router is choking on large designs? Your "AT A GLANCE" comment on probability-analysis tools ("nice-to-have" not "must-have") doesn't seem to augur well for standalone SSTA companies.