Cooley releases results of verification survey

Hey folks, John Cooley posted part 1 of the results of his verification census on deepchip.com. Some of the revelations include increased usage of Verilog-based verification tools from Synopsys and Mentor, and a decline in the use of proprietary testbench description languages.

Cooley sent out the survey questions in March and April to his 25,000 member ESNUG mailing list, and 818 of those users responded to the 12 question survey, generating around 9,816 detailed answers.

When you’re reading a study, it’s always a great idea to look at the sample size and 818 is a nice size sample. In Item two, Cooley asks “Does your project do mixed Verilog/VHDL simulations?"In this year’s survey, 55.3% of the respondents indicated they use Verilog only, 18.0% mostly Verilog, 6.5% said they use both equally,16.4% said they use mostly VHDL, and 4.0% said VHDL only.

That compares to the 2005 survey results where 59% said they use Verilog only, 38% indicated they use a mix of Verilog and VHDL, and 3% said they VHDL only (the 2005 survey only had three questions in this category).

Cooley notes of the respondents in the 2007 survey that the “VHDL stalwarts were mostly US military contractor companies plus some (not all, but some) European companies — with the rest of the world being Verilog oriented.” He also observes that “the biggest reason why there were VHDL stalwarts were due to legacy code reasons,” noting a correlation between “legacy” and “Mentor Modelsim” in survey responses.

The survey also seems to indicate that Synopsys VCS and to a degree Mentor’s ModelSim/Questa simulators are taking share from Cadence’s line of simulators. In the 2004, survey 51% of respondents said they use Cadence. In 2007, the Cadence total was 44.1%. Meanwhile, in the 2004 survey 34.0% said they use Synopsys and 41.0 percent said they use Mentor while the 2005 survey showed Mentor dropped to 35%. In 2007, 53.2% said they use Synopsys simulators, while 35.3% said they use Mentor. And 3.5% said they use “other” vendors’ simulators.

Cooley surmises the change in HDL simulation share can be attributed to Synopsys and Mentor both pushing System Verilog support, while Cadence has been “somewhat aloof and standoffish” about System Verilog (which is owned by Synopsys).

In the case of linters, Atrenta’s standalone linter Spyglass is doing fairly well, considering the big simulator vendors offer linting for free in their simulation environments, according to the Cooley survey.

The survey also revealed favorable responses to two as of yet formally available tools: the Certess Certitude code coverage tool and a popular demo of a yet unnammmed code denibulator from a vendor called Nusym. Cooley has taken it upon himself to name Nusym tool the "DeNibulator."

In the “everything debug that isn’t a linter” category, Novus again shines with pretty much all its tools, showing fairly substantial growth across is product line.

In survey item 8, the survey results seem to indicate that users are starting to prefer System Verilog and SystemC over proprietary languages like Cadence/Verisity Specman “e” and Synopsys “vera.”

In 2005 43% of respondents said they don't use either “e” or “vera,” while 29% said they use Verisity Specman "e,” 27% said they use Synopsys Vera and 1% said they use both.

In the 2007 survey, 57.1% said they don’t use either, 18.2% said they use Verisity Specman "e,” 20.7% said they use Synopsys Vera, while 6.9% said they use both.

In survey question 9, Cooley notes that SystemC SCV and the JEDA language, once proprietary language competitors to “e” and “vera”, are not fairing well either, with 6.9% of users saying in the 2007 survey they use SystemC SCV, down from 9% in the 2004 survey. Cooley said this year, he didn’t even ask about JEDA “because even the folks from the old Jeda Technologies had bailed on their proprietary JEDA stuff in order to promote their version of SystemC assertion tools.”

Watch for the second half of the survey in the coming weeks. Who knows if and when he's going to do a DAC trip report for last year???