Xilinx non-volatile FPGA harkens new era for system in package FPGAs; new avenue to dump Flash RAM inventories?

Hey folks, I was at the GlobalPress 2007 Summit last week in Monterey, Cali to hear what a bunch of different companies in the electronics design space are up to. Lots of neat stuff, but probably the coolest announcement came from Xilinx, which used the venue to release its first non-volatile FPGA. I wrote up the announcement “Xilinx goes non-volatile with Spartan-3AN FPGA” shortly after the Xilinx briefing, but since then I’ve been thinking about the potential significance of the release—it really is interesting on many levels.

For one, this really was the first time an FPGA vendor has offered a system in package FPGA. Xilinx is stacking its SRAM based die onto a Flash NOR to attack the growing triple play market but not-yet-so-security-sensitive design market in China. It also allows Xilinx to the flagship lines of its FPGA competitors like Lattice and Actel.

I wonder if this is a sign of things to come in the FPGA space?

If the company can stack a Spartan SRAM FPGA onto a NOR and make it secure, does that mean they can soon stack a giant Virtex on one too to make it safe for the China market? Does it also mean they can stack an analog die on top of the NOR and the FPGA to further go after new markets and competitors?

I’ve written a few articles and a big feature called “Co-design” on system in package design tools (or the lack thereof) and in doing the research for some of these I found out how going multi-chip SIP versus monolithic SoC has allowed companies like M-Systems (recently acquired by SanDisk) to turn on a dime and attack new markets. In this age of giant mask costs and rapidly growing memory capacity and ever fast time to market pressures, especially in the consumer space, SIP it seems is turning into a formidable method to jump into a market without the pains of cutting teeth on advanced process geometries, buying advanced tools for those process geometries and paying huge mask and design costs. Of course you still have package costs and must have known good die, but it would seem a no-brainer in some applications.

SIP may also help semiconductor vendors unload inventories. Indeed the Xilinx announcement may give Flash (and other chip) vendors a new avenue to sell and or dispose of inventories. It’s interesting to note that in announcing Spartan-3AN to the world, Xilinx did not name the NOR supplier and/or the NOR supplier did not want to be named, which makes one wonder if the NOR vendor was quietly unloading excess inventory (they usually make a big deal if it’s a big sale but don’t if it’s a fire sale). It’s also interesting to note that nowhere in Xilinx’ press release does it say “system in package,” rather it says “single chip solution,” which makes one further believe (A) Xilinx didn’t want folks (and competitors) to know it was offering a SIP (unless of course they asked) and/or (B) that the NOR vendor didn’t want to be associated with the deal (the NOR market has been squeezed by PROM on the low end and NAND on the high-end—so it isn’t doing so well). I’m guessing (C) “All of the above” is the correct answer.

Nonetheless, it will be interesting to watch how Xilinx and SIP fares in the FPGA space.