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EDA Troublemaker panelists sing "Kumbaya?" Part 2

February 23, 2007

(continued from EDA Troublemaker panelists sing "Kumbaya?" Part 1)

In addition to standards talk, Cooley also tried to press on one of EDA’s traditional hot buttons: litigation.

But perhaps for the first time since their litigation began, panelists representing Magma and Synopsys were…cordial. When Cooley asked who Synopsys was going to sue next, Chilton responded by saying that it is every company’s “fiduciary responsibility to protect their IP.” [The lawsuit against Magma] is going to wind down pretty soon and then it is in the hands of the capable courts and we’ll see how it ends up,” he said. When Madhavan then responded by saying the EDA industry has to make efforts to resolve these issues without getting lawyers involved, Cooley interrupted, saying “are you guys kissing and making up?”

“We look forward to winding it down,” said Madhavan. “It takes two to tango and we’ve been really happy with the progress in the courts and we look forward to finishing this pretty soon.” “Are you two going to sing ‘kumbaya, now?’ What’s going on?” Cooley asked, astonished by the tame dialog between the two panelists, whose exchanges in years past have been very heated.

Indeed recent announcements, most notably that Magma has withdrawn its antitrust suit against Synopsys, seem to indicate the litigation between Synopsys and Magma is indeed coming to a close.

Panelists also addressed the recent goings on in the DFM market. In recent months, industry watchers have been predicting the DFM market, which is roughly 20 startups strong, would consolidate. Cooley himself has been holding a “DFM Deathwatch.” Indeed over the last few months Brion Technologies was acquired by ASML and earlier this week struggling OPC optimization tool provider Aprio merged with not so struggling DFM startup BlazeDFM. Thus Cooley asked Sharan about the status of Clear Shape and what DFM company he thought would die next.

Sharan sidestepped predicting what DFM company would exit the market next saying “definitely not Clear Shape.” “Our focus is on building value and there are three exit strategies: go IPO, become hugely cash flow positive and get acquired,” said Sharan. “Our exit strategies are in that order of reference but the reality may be in the opposite order.”

Sharan of course did not include a fourth exit, which is going out of business.

SystemC and system level design was another hot topic.

Panelists also discussed the growing competition in the DRC/LVS tool space. That space has been dominated in recent years by Mentor’s Calibre tool, but roughly two years ago Magma introduced a tool into the space as did Cadence, claiming significant runtime improvements over Calibre. But at DAC, last year Mentor introduced a speedier version of Calibre called Calibre nmDRC. Surprisingly, Vucerevich complimented Mentor on the upgrade saying Cadence’s own DRC tool, PVS (physical verification system) hasn’t yet lived up to Cadence’s expectations. Meanwhile, Madhavan said that after working out a few kinks over the last year, Magma’s Quartz DRC/LVS tool is starting to gain momentum, grabbing key customers including IBM and nVidia.

Forte’s Cline said that 2006 was the first year in which the larger semiconductor companies started adopting SystemC and that it will likely take time for the language to mature to the point where it pushes out HDLs like SystemVerilog and VHDL. Mentor’s Chern noted that the company’s Catapult-C, its ANSI C, system-level design product has been growing rapidly within Mentor. “We are doing quite well in Japan and North America and we have 63 companies using it,” said Chern. “Right now our focus is not trying to compete with each other, between SystemC and ANSI C, but whether it will become the design methodology,” said Chern.

Panelists were also asked about what appears to be stepped up outsourcing and growth of offshore design centers, specifically in India. Sequence CEO Vic Kulkarni noted that design today is global and specifically the reason his company has a big presence in India is because most of EDA’s biggest customers also have large design centers in India.

“Last time I checked there were 130 chip companies within Bangalor and Hidroba, and out of those, 15 are multinationals and they employ something like 4,000 engineers right now. There are also 15 EDA companies {Cadence, Synopsys and others} in India and they employ 2000 engineers.”

Kulkarni noted that it behooves EDA companies to have facilities located near large customer bases. In the past EDA companies have opened offices in Taiwan, Japan and Europe, so it should be no surprise they would also open offices in India and mainland China.

Posted by Michael Santarini on February 23, 2007 | Comments (0)
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