Between The Lines
EDN Senior Editor Mike Santarini covers digital design and the EDA, ASIC, and FPGA industries. [Editor's note: As of Feb. 2008, this blog is no longer active and is presented here for archival purposes.]
DesignCon 2008: One step forward, two steps….
I attended DesignCon last week and covered two events: “Where’s the ROI on DFM?”, which was a lively business panel, and a panel moderated by EDA industry analyst Gary Smith on functional verification. I actually planned to write-up a few more events but was sad to find that the others I attended lacked substance and were largely product and/or marketing pitches. I’ve b ...... Read More
Comments (7)EDAC CEO Forecast: 2% growth for EDA revenue in 2008? EDA blues or blue skies ahead?
Just got back from the EDA Consortium’s annual EDA CEO Forecast and for the most part the CEOs seemed particularly gloomy when it came to revenue forecasts for the year. In brief, the CEO’s didn’t offer any forecasts but Mentor CEO Wally Rhines, whose company is in a quiet period and thus could not give a prediction for EDA industry growth in 2008, pointed to a report from one ...... Read More
Comments (6)My IC reliability cover story and my upcoming DesignCon DFM panel
Hi folk, I’ve been in hunkered down mode for the last few weeks researching and writing my next cover story. This one’s on IC reliability. It’s a subject I haven’t tackled before and quite frankly is a subject I haven’t seen too much coverage about, even the EE trade books. I actually learned a quite a bit of information about how design groups and more so semico ...... Read More
Comments (4)Brave, Brave, Brave Sir Robin…Saxby
EDN’s sister publication Electronics Weekly has a video clip of ARM’s Sir Robin Saxby receiving the Elektra Lifetime Achievement award…way to go Sir Robin! ...... Read More
Comments (0)Calypto RTL to ESL equivalence checker gets vote of confidence
A few years ago when EDA startup Calypto introduced its SLEC (sequential logic equivalence checker) tool, I thought it was a very promising technology. One of the biggest issues in ESL modeling is ensuring that the block or design you are modeling at an ES level (in C++, SystemC or ANSI C, etc.) is functionally the same as the RT level implementations. Not having a way to tell if they are the same ...... Read More
Comments (1)"Let the mayhem begin!": Open Verification Methodology available for free download
Hi folks, the contentious SystemVerilog tool interoperability standard the OVM (Open Verification Methodology) co-developed by Cadence and Mentor Graphics is now available for download. Mentor and Cadence are distributing the OVM under an Apache 2.0 license. It includes the OVM source code, documentation and use examples. You can access the license and download at www.ovmworld.org. If you want mor ...... Read More
Comments (7)Congratulations on the Xilinx CEO gig, Moshe!
Hi folks, while I was away on vacation, Xilinx prebriefed the press corps about news that EDA veteran Moshe Gavrielov has been appointed the new CEO at Xilinx. Ann Mutschler covered it for us and Ron Wilson blogged on it. First off I’d like to say Congratulations Moshe and Congratulations Xilinx! It will be interesting to see how Gavrielov transitions from the EDA to the FPGA world and how ...... Read More
Comments (4)2007: the year of EDA isolationism
I saw somewhere that the word of the year–that is, the word of 2007–was “subprime.” In the EDA industry, I think many EDA watchers would say the word of 2007 was “consolidation.” I personally think the word that best describes EDA in 2007 is “isolationism.” 2007 turned out to be a pretty good year for EDA revenues. There was a decent amount o ...... Read More
Comments (1)EyeClops and IlluStory: more educational Holiday gifts for kids
A couple of my colleagues here at EDN have been busy posting Holiday Gift Guides for Engineers. Check out Brian Dipert’s post Brian’s Brain’s Holiday Gift Guide for Engineers and Margery Connor’s post PowerSource’s Holiday Gift Guide for Engineers for some really cool gift ideas for the engineer in your life. Last year, I posted my own gift guide but this on ...... Read More
Comments (5)Living dangerously in EDA: microphone, you, Davidmann
Last week I interviewed Simon Davidmann about his not so new startup Imperas. You can read my interview by clicking on the story “EDA ESL startup Imperas close to launch.” I’ve known Simon for many years and I think he’s certainly one of the big characters in EDA. Back in the days when the industry was debating over which language, Superlog (later known as SystemVerilog ...... Read More
Comments (4)EDA has good showing in Hot 100
We’ve just posted our HOT 100 products for 2007. This year the EDA industry produced quite a few interesting tools spanning several different design disciplines. In 2005 and 2006, a vast majority of the EDA startups and new tools seemed to be in the DFM space. I think 2007 will likely be remembered as the year in which the big EDA vendors consolidated the DFM tool space and integrated many ...... Read More
Comments (0)EDA startup ATopTech causes stir
It’s been quite a while since a product release has caused such a big reaction in the EDA industry. I’m sure all the big EDA players offering tools in the place and route world have busy on their phones today speaking with financial analysts, whom are wondering what EDA place and route startup’s ATopTech’s announcement means? Early this morning ATopTech announced a trip ...... Read More
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