An x86 Wednesday: AMD's 65nm Distress And An Intel Naming Contest
AMD, a company which (along with its competitors) I’ve criticized in the past for conducting intros that were heavy on hype and light on significance ("lots of sizzle, little steak", as the saying goes) notably shifted gears on Monday when it rolled out the Athlon X2 7750 Black Edition and Athlon X2 7550 dual-core CPUs. The company was so quiet that it didn’t even generate a press release to commemorate the occasion; see for yourself. At first, I was baffled, because although the products’ names imply an extension of the longstanding K8 microarchitecture, they’re actually the company’s first dual-core products derived from the K10 ‘family tree’ that previously spawned Barcelona (i.e. the quad-core Opteron) and the triple- and quad-core Phenom. But once I dug into the details, the likely reason for AMD’s reticence become more clear.
The 2.7 GHz Athlon X2 7750 Black Edition, complete with an eyebrow-raising $79 1,000-unit price tag, is the only chip of the two that will be sold directly to consumers; as its name implies, it has an ‘unlocked’ core clock that’s amenable to overclocking and other technical shenanigans. The OEM-only Athlon X2 7550 (with unpublished pricing) runs at 2.5 GHz. Both chips offer 2 MBytes of L3 cache, the same memory allocation as their triple- and quad-core Phenom siblings, which was my first clue that these weren’t dedicated dual-core IC designs (which AMD’s original ‘Kuma’ roadmaps had suggested would be the case). And, as it turns out, their 283mm2 die sizes are identical to 65 nm Phenom CPUs…these chips are in actuality quad-core Phenoms with two on-die CPU cores disabled.
I was admittedly flabbergasted when AMD rolled out its single-core-disabled Phenom products, after considering the amount of silicon the company was leaving unused (therefore non-revenue-generating), and thereby interpreting how poor the company’s 65 nm fully-functional die yields must be. Now I frankly don’t know what to think. Take a look at a Phenom die shot and you’ll see just how much area each core and its corresponding L1 and L2 cache allocation takes up:
Eyeballing this image, I’m guessing AMD’s wasting at least 33% of each dual-core CPU’s surface area. Have 65 nm yields plummeted even further? Does AMD have so much unsold 65 nm product in inventory that it’s doing a fire sale to clear out the warehouse? Or have the company’s aging K8-based dual-core products just become so uncompetitive that AMD was forced to make this desperation move? Regardless, as I said just last week, 45 nm-based Phenom II can’t come soon enough…and the company had better hope that this particular lithography and products based on it are much more robust than their troubled predecessors.
AMD’s troubles don’t exist in a competitive vacuum, of course, there’s Intel’s imposing Nehalem microarchitecture to consider. The first products derived from the Nehalem foundation are Intel’s Core i7 chips, whose naming is among the most bizarre the company’s marketeers have ever come up with (to the limits of my admittedly imperfect memory). Intel’s PR folks assure me that ‘all will be clear’ when future Nehalem variants also appear, but in advance I think I may have already cracked the code. Core i7 chips have:
- Four CPU cores, and
- Three onboard memory controllers
4+3=7, i.e. ‘Core i7′. It’s feasible to expect that future, lower-priced Nehalem spins will make silicon-slimming (got that, AMD?) allocation reductions of one or both resources.
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