Apple's iPad: The CPU Packaging's Really Rad

Following up on Friday night’s FCC-supplied post, my partners at iFixit flew to Richmond, Virginia that same evening and, bright and early the next morning (after waiting in line all night), secured a full-production iPad and promptly disassembled and photographed it. You can find all of the sordid details and pictures here; remember that this is a Wi-Fi-only device, so the interior corner intended for the 3G cellular data sub-assembly is empty, and GPS capabilities are also absent. I’m going to focus in on the semiconductor-heavy main logic board and wireless sub-assembly in the analysis that follows.

Here’s the main logic board top side:

And here’s a close-up:

And another:

In the FCC-tested pre-production unit, Toshiba was the MLC NAND flash memory supplier, whereas with this particular production unit, Samsung got the nod (with two 64 Gbit devices in this 16 GByte iPad). However, as I suggested to iFixit’s Kyle Wiens yesterday morning, I doubt that this represents a sole-sourced design win for Samsung. Rather, with a sufficiently large sample size of units, he’d probably find both vendors represented, along with other likely candidates such as Intel and Micron Technology.

The Samsung-fabricated Apple A4 microprocessor is a packaging-sandwich marvel. Under the lid are three silicon die; the ARM CPU itself (containing system SRAM) and two 1 Gbit Samsung DRAMs (the same amount as in the latest-generation iPhone and iPod touch…although with the A4, the CPU-to-memory is, at 64 bits, twice as wide as before). In Wien’s own words:

The A4 is a Package-on-Package (PoP), with at least three layers of circuitry layered on top of each other. A4 is packaged just like the iPhone processors, microprocessor in one package and two memory modules in the other package. They’re all sandwiched together in a very nice and thin PoP.

Versus the latest-generation iPhone and iPod touch, which rely on single-IC touchscreen control subsystem, the iPad leverages a three-chip approach combining Broadcom’s BCM5973 and BCM5974, plus a Texas Instruments analog chip labeled ‘CD3240A1′. This arrangement, reminiscent of that in prior-generation iPhones and iPod touches, is reflective of two related factors:

• The unit’s comparatively large screen size, therefore
• The comparatively large amount of internal space available for the PCB, translating into the ability to go with a more mature (and therefore less expensive) three-chip topology

Next, here’s the main logic board bottom side:

Passive components and analog ICs (among them Cirrus Logic’s audio codec, Dialog Semiconductor’s power management unit and Linear Technology’s two regulators) dominate the landscape here, notably two Apple-labeled chips.

Finally, let’s take a gander at the de-lidded wireless communications module that I previously mentioned is located on the dock connector-to-logic board interconnect cable:

The IC here is, as I previously suspected, a Broadcom BCM4329, which combines "single-band (2.4 GHz) 802.11b/g/n or dual-band (2.4 GHz and 5 GHz) 802.11a/b/g/n, plus Bluetooth 2.1 + EDR and FM receiver and transmitter features." Given its low-power nature, it’s a single-stream 802.11n transceiver.

Another system design comment; attendees of Apple’s iPad unveiling event in late January spied what they thought was built-in camera in the unit Steve Jobs had on stage. As it turns out, that suspicion was incorrect; an ambient light sensor locates in the area where the camera was believed installed.

And finally, my still-unanswered questions from last Friday night:

• Does the CPU boot from the NAND flash memories, or is there a separate NVM firmware device? And
• Where are the accelerometer (whose supplier, according to Chipworks, is once again STMicroelectronics) and the silicon compass, assuming the latter exists, following in the footsteps of the iPhone 3GS?