Turion 64 X2: A Credible Choice?

In my earlier two blog posts today, I admitted to a rising desire for a dual-core laptop. However, I didn't explicitly specify that the mobile PC had to be Intel-powered. That's because (at least in the non-Apple world) there's now a choice. AMD's Turion 64 X2, which I previewed at an offsite demonstration during the Intel Developer Forum two months ago, has officially arrived, along with 64-bit spins of the cost-optimized, Celeron-competing single-core mobile Sempron family. Today's announcement expands on the power-focused front the company opened yesterday when it revealed that it'd soon start shipping low power-screened, albeit higher-priced, variants of its current and future-generation desktop processor chips.

Ever since AMD 'went its own way' with the Intel-compatible but non-Intel-cloning 5×86 (aka K5) processor design unveiled in 1995, the company has consistently touted its claimed higher performance at equivalent clock speed to an Intel competitive product (or, said another way, equivalent performance at lower clock rates and, therefore, lower power consumption) via metrics such as the PR rating system. The pre-briefing that I received in advance of the Turion 64 X2 unveiling was a notable divergence from that longstanding pattern; then again, AMD's no longer competing against Intel's power-hungry NetBurst architecture. Matt Mazzantini, AMD's Mobile Division Marketing Manager, stated the new positioning this way, "At like frequencies, we expect to be able to deliver the same performance as Intel's Yonah, at a smaller cache size". And, regarding pricing, he provided the generality that AMD's budgetaries would be "below what Intel publishes at 1Ku, at the same clock speed."

The 'smaller cache size' claim is key for AMD, because although Intel is in full production on a 65 nm process, AMD will still be running all of its products on 90 nm lines at least through the end of this year. 'Smaller cache' implies smaller die, all other factors being equal (which, per the previous sentence, you already know isn't the case). However, this positioning in combination with the strong pricing statement implies that AMD's per-chip costs are in line with those of its bigger foe (which may or may not actually be the case; AMD declined to provide more exact die dimensions, and chip yields are also unknown….cost and price don't necessarily have a strong correlation in the semiconductor world). My AMD contacts followed up the briefing with more precise pricing details (all 1ku):

• TL-60 (2 GHz, 512 KByte L2 cache per-core): $354
• TL-56 (1.8 GHz, 512 KByte L2 cache per-core): $263
• TL-52 (1.6 GHz, 512 KByte L2 cache per-core): $220
• TL-50 (1.6 GHz, 256 KByte L2 cache per-core): $184

AMD also focused on the frontside bus implementation differences between Turion 64 X2 and Intel's Core Duo (aka 'Yonah'). Mazzantini pointed out that whereas Intel's approach employed a 667 MHz, 5.3 GByte/sec peak scheme variously used by both cores, as well as by external I/O and memory traffic (and marked with a bright red 'Bottleneck' on the foil), AMD's integrated DRAM controller and dedicated core-to-core connection meant that the 1600 MHz 6.4 GByte/sec external HyperTransport link was exclusively devoted to I/O.

However, when pressed to justify the scarlet-lettered 'Bottleneck' label, i.e. to provide data showing that AMD's higher bandwidth potential translated to real-life performance gains (or, said another way, to an actual Intel bottleneck), Mazzantini backed down, saying of Intel "There's no data to suggest today that it's swamped. They've done a lot in terms of the additional cache that they've added. They've done a better job versus the challenges that they may have faced in the past." And he didn't have a strong response to my long-standing critique of AMD's approach; in today's increasingly common cost-optimized integrated graphics architectures employing PC main memory as the frame buffer, the GPU is several 'hops' further away from memory than it would be in the Intel schema (where the 'north bridge' core logic chip both contains the graphics core and the system memory controller).

Continued with 'Is There Reality Behind the Hype?'….