Is mixing embedded and consumer branding a good idea?

As far as I know, no other vendor supports the xDM API. I was suggesting that to support TI?s existing xDM software development model (with heterogeneous cores) for the DSP-only devices, that they should consider developing host-side support for the API to those candidate microprocessor architectures that a designer might attach a DSP-only Davinci device to. For those systems that will use the DSP-only device without a host processor, presenting a logical separation would enable simpler migration both ways between single-core designs and heterogeneous multi-core implementations.

To address how the Coretex architecture should reduce variability, I refer to the Coretex-M3 processor because it is the only Coretex architecture that is currently available in a production device (Stellaris from Luminary Micro, www.luminary.mico). The architecture is based on the ARMv7-M architecture, and it includes new features that are not part of the existing ARM7TDMI baselines. Of note is that many of the new Coretx-M3 features are mechanisms by which existing ARM7TDMI licensees have differentiated their products. For example, the ARM7TDMI processor is flexible about how licensees implement interrupt and exception handling. The Coretex-M3 adds 36 new instructions that encompass and standardize some features implemented as differentiating (and non-portable) capabilities by ARM7 licensees, such as bit-manipulation, byte- and halfword manipulation, saturation and 64-bit integer arithmetic, program flow, managing semaphores, integrated system tick, power management instructions, and an optional memory protection unit. For more details check www.arm.com/pdfs/Porting%20ARM7TDMI%20Software%20to%20the%20Cortex-M3.pdf.

(continued from above) According to my conversations with Intel, those processors that find their way into embedded applications ramp up a year or more after the computing version of the processors have already fallen off. Intel supports their embedded version of their processors by: committing to support a five or more year lifecycle; by developing and making available the graphic drivers needed to support the non-standard display sizes found in the embedded environment; by validating RTOS support for these processors; and by providing customer boards that support development with these devices in appropriate form factors for embedded applications. As for the branding question, during first year of an Intel processor?s lifecyle, the overwhelming majority of those devices are sold to the consumer, or end-user, in a computer or server, and the processor is a major part of their buying decision. In contrast, the Davinci brand is an infant brand that must develop a reputation and acceptance within the embedded design community before the consumer market can see many products based on those devices. Branding efforts like these need to clearly communicate their consistent value-add to the embedded design community so that it can distinguish itself from the multiple other competing offerings.

I focused on ARM, MIPS, and Power in this post because they are architectures that are targeted primarily to the embedded space. These architectures are usually available with significant integration of resources and peripherals targeting the requirements of many types of embedded applications. These processor architectures are commonly available in heterogeneous multi-processor configurations. Several processor vendors offer ARM or MIPS cores paired with DSPs. The Power architecture is available as a hard core implementation in FPGAs from Xilinx. In contrast, most of Intel?s processors target primarily the computing market, and some of them are suited for consideration in embedded designs with desktop- and server-like requirements. Mercury?s E-cast, that you indirectly reference, carefully qualifies the benchmarks they present as appropriate to server-type applications that benefit from an SMP configuration. These processors offer a rich ecosystem to support graphical human-machine interfaces. The embedded version of these processors rely on a support chipset rather than offer a single device with integrated peripherals. (continue next comment)

I am unable to figure out so as to how introduction of Cortex arch. from ARM will reduce the variability b/w architectural licensees. Also please explain - "even though the code will execute on the same processor core, there is a logical separation of the signal processing and application code as if they were on separate cores". I have no idea about the APIs provided by vendors other than TI and following question may be vague, do they support xDM? If no how making xDM robust will help in software variablility?

I really enjoy reading your blog and think the topics you are covering are very relevant to the embedded community. The growth and importance of medical, the timing of product announcements, and now the issues related to embedded branding are all very relvant. However, one issue I do have with your blog is that in every one of these postings your examples have touched on ARM, MIPs, Power, DSPs, FPGAs...notably missing embedded Intel architecture. Recent improvements in performance per watt and vector processing and the impact that may have on Freescale are noted in this recent blog posting. (see vmenow.com "Is Intel Ready to Eat Freescale's Lunch?") I think the point of your blog, however, stands as Intel also uses consumer brands in embedded. These brands designed to make sense to the end-user in the consumer space don't neccisarily translate to the embedded developer who is interested in a brand that identifies and addresses the wants and needs from a software programming point of view.