Lattice, SiliconBlue start summer sizzling

I don’t know about you, but summer got off to a soggy and chilly start in the Rocky Mountains – nearly two weeks of rain with few letups. I was anticipating a similar freeze-out for FPGA announcements as we bounce along the bottom of the historic 2008-09 recession, but so far, the activity is pretty impressive. Just this week, Lattice Semiconductor Corp. and newcomer SiliconBlue Technologies Inc. made some significant announcements.

Lattice is extending its ispLEVER design tool suite with a Service Pack 2 that expands features for the mid-range ECP3 and nonvolatile memory-based XP2 programmable logic families. For the latter family, the new release is the first time Lattice design suites have supported industrial-strength XP2 devices. The design tools have supported ECP3 in the past, but the new upgrade improves the reporting of static timing analysis and simultaneous switching output noise, so that the actual board-level behavior of FPGAs will better match what the tools report.

SiliconBlue, which launched its ultra-low-power devices earlier this year, sampled a new “turbo” device this week in its iCE65 family. SiliconBlue is still using the 65-nm process technology from TSMC, but has binned faster devices, offering 65 percent speed improvements over its standard line. If this keeps up, this may not be such a quiet summer for FPGA designers after all.