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FPGA-based server parallelism

June 10, 2009

Ladies and gentlemen, start your engines! Mitrionics already introduced the world to hybrid server performance based on parallel FPGAs. Now, the company is hoping to make the programming of such unique platforms more palatable through a Linux software development kit.

In theory, this could provide the shakeup to the data center that we’ve seen FPGAs provide to the DSP-centric signal-processing world in the last few months: Single-core or even multicore FPGAs offloading parallel algorithms may go head to head with four-way or eight-way multicore processors in a client-server environment, especially in the large data centers aimed at cloud computing. Except….

You know there was going to be a “yes, but” in this post. It will not revolve around parallelism per se, since specialized MP platforms from companies like Thinking Machines Corp. were able to gain ground in the 1980s against traditional SIMD supercomputers. But these systems were competing in the high-performance simulation worlds where alternatives were few and far between. Mitrionics and any competitors it may spawn will be going directly up against the Dell, HP, and Oracle/Sun platforms of this world.

Let’s be clear about how Mitrionics is using the term “parallelism.” The advantage in low power dissipation to using the company’s architecture is not that FPGAs themselves are used in massively-parallel configurations, but that FPGAs are used as co-processors for certain transaction-processing and integer-manipulation operations, allowing an ideal power mix between a control-plane system processor and the FPGA (implemented in single- and dual-FPGA boards at Mitrionics). Thus, the launch of the SDK this week is arguably as important as the launch of the hardware.

In military and imaging worlds, customers are slowly showing themselves willing to shift from canned DSP routines based on standard DSP processors, to flexible FPGA algorithms for DSP. Will this be true in the mainstream IT world? Will developers of business process optimization programs be willing to take a gamble on Mitrion-C? Part of me says that Mitrionics’ own hardware could be a ground-breaking platform for the Stratix-III (as well as for Virtex-II Pro and -4, since the Mitrionics software is ported to that family). But part of me says that Mitrionics faces an uphill battle to gain a toehold in the data center.

Posted by Loring Wirbel on June 10, 2009 | Comments (2)

April 16, 2010
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June 25, 2009
In response to: FPGA-based server parallelism
XYZ commented:

Transaction based offloading has it's place but is only useful when the computation is the same (eg video or DSP algorithms). For a general application the offload-engine model breaks down. There is a break-even point where loading the 'algorithm' code and using the regular compute facilities available. After this there has to be a trade-off of one system vs the other (ie custom specific accelerators vs. generalized architectures). It should be noted that the Graphic and Physics Processors have a lot of capability in this area and have a very clean architecture to load and store 'off-load' software elements. Since their architecture has been tailored for highly parallel single precision and double precision matrix multiplies, it is worth investigating that route.

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