Parallel species search

A fascinating press release with little information showed up over the April 10 weekend, hinting at a new use of DSP-enhanced FPGAs in performing the Phylogenetic Likelihood Function, a method of determining the relationship of species in evolutionary studies. I’ve been able to figure out that this abstract describes a paper in BMC Bionformatics 2010, by Stephanie Zierke and Jason Bakos. It appears likely that the duo may have performed the work at University of South Carolina, and both have experience in programmable logic, packaging, and MEMS.

The abstract describes the use of the MrBayes 3 design tool for mapping PLF, an algorithmic loop that has no dependencies between iterations, into the architecture of an FPGA with DSP cores and high-bandwidth local memory. The duo claim an acceleration of ten times over running PLF on an integer-based microprocessor. The paper claims that the speedup is achieved by deep pipelining of the PLF functions, and performing several DSP operations in parallel.

But that’s as far as my Google searches have taken me. Have there been other attempts at implementing PLF in DSPs in the past? What type of FPGAs were used? Has this method been used in any genomic-sequence or evolutionary studies? If anyone associated with the study happens to read this blog, please forward me more information. This sounds intriguing.