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HPC programmability at SC09, Part 2

November 19, 2009

FPGAs are more commonplace in Portland this week than I thought. The last FPGA Gurus post described Convey Computer’s presence at the SC09 conference in Portland, and how supercomputers might see greater competition from configurable board-level products as they migrate down from MIMD monster size to simple rack-mounted hybrid systems.

Turns out another exhibitor at the high-performance computing show is Nallatech, which is showing off the latest two members of its family of COTS PCI Express boards, the newest using the Xilinx Virtex-5. Notice those key qualifiers – COTS. PCIe. Add-in board. Nallatech recognizes that the easiest way to get into an existing server farm may be to offer reprogrammable components for a blade-based platform. Like Pico Computing, who we mentioned last week, Nallatech does not pre-define the software for a vertical market, but works with others to characterize the FPGAs.

I am not suggesting the role of the FPGA in a pre-packaged supercomputer will be minimal, nor am I suggesting Convey has a narrow market window. But just as the dedicated supercomputer of the 1990s was replaced by a user-configurable cluster of servers and storage controllers, the rack-mounted pre-defined supercomputer could be displaced by systems that the end user can define at the level of board, FPGA, core processor, and software. There will likely be room for both approaches, but modularity has defined the data center for the last two decades, and the trend will probably accelerate rather than reverse.

Posted by Loring Wirbel on November 19, 2009 | Comments (3)

April 16, 2010
In response to: HPC programmability at SC09, Part 2
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November 19, 2009
In response to: HPC programmability at SC09, Part 2
desert rat commented:

The data center is abandoning blade servers. ANYTHING that uses a backplane is tabu in the data center. Why? Because they are too expensive, they are unreliable, they are SLOW (anytime you go to the backplane for anything, you lose performance faster than a anorexic Tijuana crack hooker on the Jenny Craig Plan loses weight). Also, the data centers are dumping that stupid 3-tier structure (Infiniband on the control plane, 10GE on the data plane, and SATA/FC on the storage plane) and the three different software models. They are dumping copper cables and going to optical connections. A data center will soon be a bunch of 1U motherboards connected together in a packet-switched network of optical connections. And the FPGA-based boards will be the packet-thrashing machines. You only have one software model left (after dumping the control and storage plane junk) wil all packets buzzing around on the only plane left: the data plane. I always thought that the 3-tier structure was stupid and a lot of overkill...it was engineers just exercising their egos and never made any sense to me technically. Also, PCIe is a dead duck, especially at the data center. PCIe is a very retarded interconnect...it has no systems level mechanisms for syncro or broadcast. So, PCIe can be used in low-end lame retarded apps, but not true High Performance critical apps. 10GigE will wipe PCIe out, especially as we all migrate to optical connections at 10G. You just cannot build reliable systems with 10G on copper. Even the PC is going to 10G on optical connections (Light Peak). So, you are only seeing about 1/6th of the iceberg right now...


November 19, 2009
In response to: HPC programmability at SC09, Part 2
Andy T commented:

While modularity HAS defined the data center for the last two decades, capital expenditure constraints by utilities have resulted in these data centers being informed of power caps at the building entry - that's power for cooling plant and computer(s) combined. To me, and respectfully in disagreement with your trend prognosis here, that says the next defining approach to design of HPC will be power efficiency, not necessarily modularity. MIPS per Watt, not MIPS per Blade.

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