The end of the NRE

John Daane, CEO of Altera Corp., and Gartner vice president of research Bryan Lewis, were placed under the microscope at the end of March from EDN’s Ron Wilson and David Manners of Electronics Weekly – Daane for assuming that all economic trends point relentlessly to FPGAs, Lewis for suggesting the last calendar year actually represented a renaissance for ASICs and a setback, albeit slight, for FPGAs.

Ron says that Daane fails to look at those specialized programmable markets outside FPGAs proper, such as the special microcontrollers similar to the one introduced by Atmel Corp. last week, and the ASSPs for special graphic, audio, and video applications that can be upgraded in the field. To the extent that Ron says that Daane tells too one-sided a story, I might agree with him.

But here’s where I think Daane might be on to something, and where I think the slightly improved market share for ASICs overall may be a temporary glitch: At a time when every budget is constrained, any non-recurring engineering cost, particularly an NRE measured in six figures, becomes an unjustifiable expense. This is why Atmel made such a big deal of their $75,000 bargain NRE: charging any amount of money for assisting the customer from netlist to verification will be something looked askance upon by finance departments, even if it means first-pass success for a chip.

That’s why, when all is said and done, I think that Gartner’s momentary observation for upticks in ASIC market share will not be sustained in a year like 2009. Daane may have overstated the case in suggesting that consumer spending patterns alone will drive OEMs to FPGAs. But when those trends are combined with a reticence among OEMs themselves to pay for NREs, the era of full-custom ICs, gate arrays, and cell-based ASICs may be drawing to a close. The only alternative to FPGAs that can carry weight in a recession era will be the specialized programmable MPUs, MCUs, and ASSPs that carry no burden of an up-front NRE.