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New concepts in mil-aero design

June 1, 2009

This week’s Military and Aerospace Electronics Forum in San Diego certainly reinforces the notion that there is plenty of new activity for FPGA prototyping in military markets, particularly for communications and intelligence. Given that Xilinx Inc. recently introduced its defense-grade Virtex-5Q, it’s not too surprising that partners have elected to launch new Virtex tools.

CSPI Inc.’s MultiComputer Division, for example, debuted the FastCluster FPGA Development Platform on June 1. By partnering with Annapolis Micro Systems for development tools and DSP libraries, CSPI created a platform that marries the Virtex-5 XMC development board with CoreFire Design Suite. The CSPI graphic interface and dataflow model allow the programming of thousands of Xilinx’s DSP48E slices on the FastCluster platform. The platform is hosted on a standard Windows-based PC.

On the Linux side of the street, Xilinx demonstrated a Reusable Software Component in conjuction with LynuxWorks Inc., that meets objectives of the RTCA/DO-178B standard. The component links the LynxOS real-time operating system with the Virtex-5 FXT FPGA. The RSC can utilize dual PowerPC 440 processor blocks in the Virtex-5 architecture. The DO-178B avionics standards are being referenced by the Federal Aviation Administration as well as the Pentagon, so the Xilinx/LynuxWorks effort could end up with a broad user base.

Posted by Loring Wirbel on June 1, 2009 | Comments (3)

June 3, 2009
In response to: New concepts in mil-aero design
desert rat commented:

Well, would you drink something handed to you by a stranger? That is what some are doing when they take RTL code from their FPGA vendor, or get cores from some IP vendor. The MIL guys have to know what is in that FPGA. The telecoms? well, they couldn't care less about what is in their FPGAs. The only critical app in telecom is their billing system. They really don't care if the network has malware in it...they cannot afford to care any more. They are all in survival-mode. But, MIL apps must care..and must verify what is inside those devices. There are also many undocumented commands in the microcode of processors out there too....and in uP RTL code put into FPGAs. So, it's more than just malware to fear if you use these devices. It's a very dense minefield of potential problems out there, and all the FPGA users have big feet...


June 3, 2009
In response to: New concepts in mil-aero design
Loring commented:

Sally Adee at IEEE Spectrum did a dynamite article about rogue code at the semiconductor device level in the May 2008 issue. May seem to be an overly-obsessive DARPA concern to some, but remember how people used to say the same thing about using firewalls and monitoring malware. I think tracking rogue code in any microprogrammable architecture is a necessity.


June 2, 2009
In response to: New concepts in mil-aero design
desert rat commented:

Loring...there is one fly in this ointment. As the MIL folks use more FPGAs, there is the possibility that the FPGA vendor code (or some outside cores put in the device) could contain "rogue code"...that would halt a weapons system from firing at the proper time...or it could give away some secrets via radio when that RTL code cranks-up and runs (under certain conditions). Darpa called me up and asked about this possibility a few months back and how all cores factory-installed or bought from outside vendors could be verified. I found a company that does an RTL core that you put in the FPGA.... that monitors execution and will find any rogue code sitting around in the device code in testing...I can find that company if you like. With Obama's new initiative for cyber-security, this also applies to FPGA code in my mind.

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