FPGA Gurus
Analyst Loring Wirbel covers programmable logic from an application perspective, providing a sneak peek at the vertical applications that help drive FPGA complexity, performance, and density. The blog will feature videos allowing engineers to spotlight their latest designs, along with news of products and corporate trends at FPGA vendors and the developers of third-party tools for programmable logic.
Altera's Case for DSP in Industrial Control
We’ve been watching the board-level embedded folks like Mercury Computer Systems and Pentek shift over the last couple years from DSPs to high-end FPGAs for real-time filtering and signal processing. Now, Altera’s senior DSP marketing manager Michael Parker has written a piece for EETimes Asia on using the company’s Quartus II, SOPC Builder, and DSP Builder tools for effe ...... Read More
Comments (6)Tier Logic's Threefold Path
Tier Logic has gotten the occasional mention in this blog as a startup specializing in 3D interconnect, but after the splash made by players such as Tabula, NuPGA, and Abound, one could almost be tempted to ask what the company would do for an encore. But on the eve of Tier Logic’s official “architectural announcement” of March 10, Tier’s vice president of sales an ...... Read More
Comments (3)Revisiting High-Speed Serial Protocols
Ever since the IEEE 802.3 Ethernet high-speed study group approved dual project authorization requests at 40 and 100 Gbits/sec that became 802.3ba, most of the debate regarding next-generation Ethernet has centered on issues such as the channel multiplexing for transceiver modules – will it be x4, x10, x12, and when will a copper alternative in a high channel-count module be preserved? ...... Read More
Comments (2)The price of time-sharing and multiplexing
The familiar question, “How much did you have to put down on that time-share?” will soon be expanding from condominium real estate to advanced chip design. Tabula’s introduction of the provocatively named “Spacetime” earlier this week generated a lot of discussion on a characteristic seen in a few new FPGA architectures (3D interconnect) and one that is rath ...... Read More
Comments (5)Putting FPGAs in better control
Actel Corp. today (March 2) is launching one of the better embedded ARM architectures I’ve seen of late, in or out of the FPGA market. SmartFusion is based on Cortex-M3, which might seem mild-mannered in days of A9 and multicore instantiations, but in this case its on-chip flash allows programming on the SoC without external memory. It’s also a big step for Actel, moving fr ...... Read More
Comments (3)Shared foundries, differentiating paths
Xilinx Inc.’s decision to emphasize the dual foundries of Taiwan Semiconductor Manufacturing Co. (TSMC) and Samsung Electronics, raised the question in the minds of many commentators: if Xilinx and Altera have the same schedule for getting to 28-nm processes, does it cut into their ability to differentiate from each other? Now that most IC design companies are fabless, and foundry alte ...... Read More
Comments (1)Patching in RTL
We’ve mentioned GateRocket a couple times in this blog, often in the context of its FPGA-based hardware accelerators. But the company is no slouch in the EDA department, and its SoftPatch feature, introduced Feb. 23 in RocketVision 5.0, is an example of the strides it is making in software tools. While RocketVision was tied from its inception to the RocketDrive hardware verification sy ...... Read More
Comments (0)ADCs are latest domino to fall
Ted Marena, a business development director at Lattice Semiconductor, just posted afascinating piece on Embedded.com, covering data conversion implementation in FPGA architectures. He compares the discrete cases of DC-to-1-KHz and 1-to-50-kHz implementations for analog-to-digital blocks. Both A/D and D/A blocks have been implemented in most major FPGA architectures in the past, but Marena ...... Read More
Comments (2)OMAP 4, embedded ARM, and Mobile World Congress
Since we spend so much time chiding Texas Instruments Inc. on the declining role of standalone DSP in the face of faster and more complex FPGAs, it’s important to give credit where credit is due, and give TI some props for the debut of OMAP 4 at Mobile World Congress this week. The latest generation of OMAP is based on the dual-core ARM Cortex-9, and thus might be seen as a more direct ...... Read More
Comments (2)Where will the ATE dinosaurs go?
Electronics Weekly published a nice piece this week from Jeremy Twaits of National Instruments, making the case for using FPGAs in the stimulus path of the semiconductor test equipment providing signals to the Device Under Test (DUT). No surprise that National would make such points. The company has emphasized software programmability and reconfigurability throughout its history, and has ...... Read More
Comments (7)Algorithmic shootout in Barcelona
For the past five years or so, Mobile World Congress in Barcelona has been the place to see mano a mano competition between FPGAs and DSPs for signal-processing algorithm dominance in 3G and 4G baseband networks. It should surprise no one that FPGAs are more prevalent at each succeeding MWC show. With the congress still a week away, Xilinx issued a release early Feb. 8 spotlighting woa n ...... Read More
Comments (0)Sometimes either/or becomes both/and
We often point to applications where an FPGA has taken the place of a DSP or network processor, so it’s interesting to note those cases where the FPGA is used alongside both a multicore NPU and a DSP. It’s no surprise that it would turn up in a modular approach to 4G basestations. In the example to be unveiled at Mobile World Congress in Barcelona, CommAgility is showing of ...... Read More
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