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Review of Synopsys’ DesignWare minPower IP Webinar

October 2, 2009

Last week, I listened to a Webinar by Synopsys’ Jay Chiang on the DesignWare minPower IP components that the company introduced at this year’s DAC. Chiang did an excellent job and made a compelling case for using these IP components. Bottom line: some early users of DesignWare minPower IP components report as much as a 48% power savings at the block level and as much as a 24% power savings at the chip level.

For the full review of the Webinar, click here.

Posted by Steve Leibson on October 2, 2009 | Comments (0)
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