Will Kenet’s FemtoCharge become the holy grail of mixed-signal silicon?

One long-sought capability for advanced silicon processing is the ability to mix leading-edge digital CMOS logic with high-performance analog circuits. Present nanometer IC lithography normally prevents this marriage. It wasn’t always this way. For example, set-top-box chip designs from ten years ago incorporated an analog demodulator front end. Today, the analog demodulator is banished to another piece of silicon because it’s not compatible with nanometer silicon. You don’t generally find high-performance analog circuits on deep-submicron (DSM) logic chips because:

• Analog circuits generally don’t scale easily (or at all) with each new process node
• Poorly scaling analog circuits occupy an increasingly disproportionate share of the available real estate
• High-performance analog circuits suck massive amounts of power and generate large amounts of heat
• Many analog designs require special process steps that disrupt the smooth (low-cost) flow of CMOS logic wafers through the fab
• High-performance analog circuits can’t run at the low supply voltages now used to run CMOS logic
• The optimum operating voltage for high-performance analog circuits can punch through the thin oxide layers of nanometer silicon

Enter Kenet, founded by some analog wizards from MIT. Go to the company’s Web site and you’ll find two (count ‘em, two) 275-MHz A/D converters (8 and 10 bits). The amazing aspect of these parts is that they’re built using a standard 180nm CMOS logic process. The trick to building these chips is an approach to analog circuit design that Kenet calls “FemtoCharge,” which eschews conventional voltage-centric analog design in favor of passing charge packets from stage to stage, like a CCD. This analog-design approach uses no amplification, so each analog stage must work with increasingly less charge.

Kenet claims that its charge-centric design approach produces circuits that are smaller and less power-hungry than conventional analog IC-design techniques. According to Phill LoPresti, Kenet’s CEO, FemtoCharge circuits are also more immune to substrate noise than conventional voltage-centric analog IC circuitry. Coupled with the design technique’s compatibility with conventional DSM CMOS processes (simulation at 65nm suggests the design technique still works at that process node), FemtoCharge appears to be a good candidate for reintroducing the lost art of mixed-signal design to DSM process nodes. And, says LoPresto, that should hint at Kenet’s road map.