Diamonds on the Tops of our Chips: Is Carbon the Next Silicon?

The September 29 issue of Science News carried a very informative story on graphene, the 2D form of graphite. Essentially, graphene is sheet-form diamond or, put another way, it’s an unrolled carbon nanotube. Graphene is very rugged and it’s a very good electrical and heat conductor. There’s been a lot of conjecture that graphene could be the next step in electronics after silicon can no longer support Moore’s Law, an eventuality now predicted to be 10-15 years in the future. Naysayers state that the demise of Moore’s Law has been often predicted and never realized. Even Gordon Moore finds it hard to believe how long his own "law" has endured. However, with oxide thicknesses now hovering around five to eight atomic layers, even low-k dielectrics can’t save a silicon-centric Moore’s Law in the long term.

One big problem has been obtaining single graphene sheets. Though thought to be difficult, physicist Andre Geim at the University of Manchester accomplished the trick with a very advanced tool: a strip of adhesive tape. The Science News article on graphene continues with a description of some pretty unique electrical properties, but what really caught my eye was a lengthy discussion of using graphene to make integrated circuits in the same way that we now use silicon.

 Graphene FET Illustration by E. Plotkin/Physics Today

Unlike carbon nanotubes, you can use nanolithography to make true FETs in graphene—which rely solely on electric fields for operation, no dopants needed—and this is critical in the nanoworld where there just aren’t that many atoms involved in the first place so each dopant atom has a disproportionately big effect. (See illustration from Physics Today by way of Science News above.) However, these field effects in graphene require nanofeature patterning on the order of 2-20 nm. In fact, it appears that you need 2nm quantum-wire channels to get room-temperature graphene FETs. However, that geometry is really perfect because that’s likely to be right below the zone where silicon peters out as a viable IC building material (although silicon will likely continue to serve as a mechanical substrate for the active graphene layer).

So, are graphene FETs actually possible? Yup. IBM’s already made them for DARPA using e-beam lithography.

Reminds me of the Paul Simon song: “Diamonds on the soles of her shoes.”