Ditch the PLL: Mobius introduces CMOS-based timing reference chip

MM, you are correct to note that Mobius'' CMOS Harmonic Oscillator (CHO) technology cannot replace TCXO''s with <5ppm accuracy in its current form. That isn''t our intention for now. While we have proven the technology on prototypes at significantly higher accuracies, the initial products from Mobius will target 500ppm USB and 350ppm S-ATA applications. On your 2nd point, our product does NOT use a PLL to synthesize the frequency, and as such, overall jitter performance is equivalent to and in same cases better than that can be achieved with quartz crystals or any other silicon device that uses a crystal reference. The uniqueness of our product is exactly this point. We have built an all-CMOS frequency source that not only complies with the frequency accuracy requirements of common interface standards, but also produces clock signals without the phase noise and jitter penalty of previous silicon timing devices. If you are interested, there are quite a few IEEE journal papers that our design team published that explain the details of the CHO implementation, and state the measurement results of our silicon. You may reach them through our website

TCXO specificaiton is +/-1ppm to +/-5ppm. 1- How could Mobius's solution with +/-500 ppm replace a TCXO? 2- Mobius's solution has to have a PLL to sythesize the frequency, so overall performance in terms of jitter won't be as good as crystal oscillator or other silicion timing devices using crystal as a refernec clock.