NXP and Open-Silicon illustrate an interesting—and maybe prophetic—division of labor
A recent press release from fabless ASIC vendor Open-Silicon highlighted a recent design completion for NXP Semiconductors. Rather apart from the usual design-win press release, this document opened a little window into what could be an interesting trend for both the fabless ASIC vendors and the ASSP business.
The information in this case is particularly useful because of the questions surrounding private-equity-held NXP as the recession tightens its grip on revenues. NXP has already announced a fab-lite strategy, dropped at least one major product group, and rearranged its R/D priorities. Rumors have suggested that in fact the company is pulling back from most chip-design work. But the details of the Open-Silicon relationship make it clear that this is incorrect.
The design in question was a media-processor chip. But more interesting than the chip was the methodology, and the relationship between the companies, that led to the design completion. The way NXP and Open-Silicon are working together may be a harbinger of a new way of working for many ASSP vendors, no matter how they are owned.
The relationship is a matter of focus, according to Open-Silicon VP marketing and business development Scott Houghton. By working with a fabless ASIC vendor, NXP is free to focus its resources on two fundamental competencies: creating headline IP like media-processing cores, in which NXP has proprietary architectural knowledge; and leveraging those cores to create foundation chips that can generate large revenue streams.
Open-Silicon is not involved in either of these key NXP activities. Nor is it involved in the now-common practice of extending the life of the foundation chip by employing register options and metal-mask changes to modify the function or performance of the basic chip. Where the fabless-ASIC company comes into the picture is further downstream.
After you’ve exploited the target market for the foundation chip, there are still ancillary markets that could benefit from the core technology, but that have slightly different requirements and are too small to justify a significant redesign of the chip. The core IP would be the same, but much of the detail—peripherals, memory sizes, and perhaps an accelerator or two, might be different. For example, if your foundation chip is a powerful video processor for HD studio use, the core technology could be a core differentiator in several other markets: security cameras and automotive safety systems, for example. But it might be that neither of these markets is large enough today to justify the new chip design they would require.
That’s where a company like Open-Silicon can help, Houghton suggested. In the relationship with NXP, Open-Silicon picks up the design database for an NXP foundation chip, gets the new design requirements from NXP marketing, and designs a derivative chip to address the new market opportunity.
The relationship is quite intimate at several points, Houghton emphasized. "It’s absolutely key that we be able to work with members of the original design team for limited amounts of time. Ideally, we get about three weeks with the original chip architects. We also try to have our verification team work with NXP’s verification engineers." Otherwise, Houghton said, Open-Silicon uses its standard, highly-tuned ASIC design flow.
This hybrid of an ASSP foundation design and Open-Silicon’s ASIC methodology can produce an interesting result, according to Houghton: an ASSP-class chip, but at ASIC-like costs. "Typically, a derivate design like this would cost a quarter to a third of the investment made in the original design," he estimated. But the chip carries the advantages of NXP’s proprietary IP.
A key issue in this scenario is just how much new content the derivative design requires. At some point, it ceases to be derivative. Houghton estimated that level at about 45 percent new content. "Beyond that, it’s really a new design," he said.
But this threshold puts a premium on the architecture team’s understanding of the implications of the new design requirements. You want to know early if something you are asking for will force a revision of the chip’s bus architecture or basic memory organization, for instance. This is one reason that the up-front time with the original architects is so important.
The alternative of outsourcing the design work to create derivative chips changes the economics of ASSPs in a fundamental way. It can still easily cost $10 to $15 million to design a mid-range foundation ASSP, without even thinking about advanced process nodes. Such costs assume an aggressive IP reuse methodology such as the SPIRIT-based one evolved at NXP.
That kind of investment demands that the chip hit a home run in its intended market. Houghton said that companies will still use all the tricks of the trade to design flexibility into the foundation chip so that register settings, fuses, and metal-mask changes can extend the life of the design for more generations, increasing the expected revenue from the design investment. But with an outsourcing relationship, the return on the foundation design doesn’t have to stop there.
The derivative work at Open-Silicon can project the core architectural design and headline IP into a new market, where it can be powerfully differentiating. But because of the much lower cost of the derivative design, this new market need not offer the home-run size of the original opportunity. By outsourcing, the ASSP vendor can take expensive differentiating technology into smaller markets. They can be the big fish in smaller ponds.
This possibility raises an interesting question. Today, managers must still justify the investment in the foundation chip design in terms of returns from the original target market, perhaps over several generations. But as such relationships as the NXP/Open-Silicon teamwork become more common, will it be feasible to use the discounted cash flow from expected future derivative designs as well in justifying the investment? Because this would diversify the company’s bets on a new architecture, it could add significantly to the expected value of a new chip design, even if none of the derivative designs is a sure thing.
Such analysis could also significantly change the requirements handed to the architecture team. Not only do we need a killer chip for market A, that can be extended through three generations of our customers’ products, but we need this platform to be extended into these other application areas as well. As you architect the foundation chip, choose wisely.
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