What happens after "I'm sorry:" the world of product engineering

Senior chip designers generally have a good understanding of the whole design flow. From requirements definition to tape-out they can explain the level of abstraction, the work performed on the design data, the opportunities and the risks at each stage. Fewer, even among senior designers I think, can speak with confidence about the tasks that start when silicon appears—the silicon bring-up process. And even fewer can speak comfortably about what happens when the new chip fails to come up properly: the realm we used to call failure analysis. That lack of information needs to change, argue two executives of that world, Presto Engineering CEO Michel Villemain and vice president of engineering Frank Sauk.

To begin with, the two would like to change the name: from Failure Analysis to Product Engineering. The reasons are deeper than just marketing spin. Villemain explains that there has been a profound shift in recent years in what actually goes on at this stage in the life of an IC design.

"A few years ago, an FA lab would have a focused-ion-beam system and maybe two or three additional pieces of equipment," he relates. When your chip didn’t work, you’d record its faulty behavior on the bring-up bench, diagnose the problem and develop a proposed ECO in simulation, and then send a die to the FA lab. They would go in through the metal layers, probe the interior nodes to verify your diagnosis, and then wire in your changes and verify them. The turn-around would be about 24 hours, and you could spin a mask with strong confidence.

But since then, SoCs have gone from four metal layers to 18. CDs have gone from 180nm to 40nm. Access through the top of the die is impossible; Sauk says that often you can’t even make thermal measurements through all that metal. So analysis of the die begins with lapping the back until the silicon is so think its transparent, and then retesting to make sure you haven’t broken anything. Then probing and measuring require a battery of mad-scientist tools such as IR imagers, lasers, and optical probes, some of whose theory of operation is still not entirely understood even by physicists. "We are dealing with not-well-understood proxies of the signals we would really like to measure," Villemain says. Further, SoCs are so dependent on software to place them in a particular mode or state that the chip often has to be connected to system stubs and running real software just to establish the diagnostic loops that will create patterns for the probing equipment.

The nature of the questions has changed as well, Villemain continues. In the 180nm days the questions tended to be straightforward: Where is this signal getting inverted? Why isn’t the bus request getting to the output pin? Today the questions may leave product engineers with a lot less to go on. Where is all that leakage current coming from? Why am I getting delay faults on this net in final test when STA says I have plenty of slack? How come nothing is coming out of this scan chain? Why am I seeing reliability issues with parts that have been in the car for a year? And turn-around times have stretched from hours to one or more weeks. It is these changes that are justification for the name change.

But the changing environment requires more than new words. Product engineering needs a new relationship with design and with the EDA industry, Villemain and Sauk insist. "Designers need a primer," Villemain suggests. "Something to tell them ‘This is what happens after tape-out.’"

Sauk agrees. "Design engineers need to understand what is and isn’t possible in the lab, and plan for product engineering as part of the process, not as some worrisome last resort." That would mean for instance understanding the access requirements of the backside probing tools, and being prepared to help product engineers navigate the design database. Even such steps as preparing the die for the correct tool before sending it to the lab can make a week’s difference in turn-around, Villemain says. Further, design teams could adjust their physical design styles to assist the new tools, just as today back-end designers place spare gates and ease congestion near suspect circuits just in case there’s a metal-mask ECO.

Similarly, product engineering needs a closer relationship with the EDA industry. "The test industry has DfT," Villemain says. "We need to push for the EDA companies to understand that they have a significant role in product engineering as well."

As the fundamentals get harder, product engineers will need to engage with the design team earlier—eventually, during project planning. "Today there is a first-time-right dogma among designers that makes it hard for them to plan for contingencies," Villemain says. Sauk adds, "But even in budgeting and scheduling, design teams often recognize the need for a mask spin or two. It makes just as much sense to recognize the need for product engineering and to plan for it, too."