Integrating RF into a CMOS logic process: another data point

After wrapping up the feature article on integrating RF stages into CMOS SoCs (the article appears in EDN’s 2 August issue) I keep running into cases in which market conditions have forced design teams to integrate even quite challenging radios onto chips for the consumer market. The most recent case in point is the Wisair WSR601 wireless USB chip announced today.

Wisair’s wireless USB offerings, like most in the market, use the WiMedia approach of an ultra-wide-band (UWB) transceiver. These radios typically use quite low power in the 3-5 GHz band for short-range, moderate-speed data transfer. But new demands are driving changes in these generalizations. Data rates are growing rapidly, with some bit rates in the range of 250-300 Mbits/second between baseband units. (Naturally a lot of this gets lost in the translation back and forth between WiMedai and USB protocols.) And increasing international regulation of sources in the 3-5 GHz area is forcing the UWB community into much higher frequencies, often above 6 GHz.

In parallel with these changes, Wisair also decided, for cost reasons, to move from a separate SiGe RF die to a radio design integrated onto the baseband SoC. This, according to director of marketing and business development Serdar Yurdakul, required a substantial redesign of the RF portion, moving to a totally different architecture. The old RF design was not going to work in the TSMC 130 nm g process used for baseband logic.

Rather than risk everything on one turn of the design, Wisair decided to do a test die, combining the new radio design with a noise source designed to emulate the worst-case noise from the baseband logic, ARM core and peripherals that would share the eventual production die. Experience with this chip led to the development of the 601.

The result, according to Yurdakul, is a radio implemented in TSMC’s 130 nm logic process that comes within 0.5 dB in power level of, and has several dB better overall link margin than, the previous SiGe design. The design includes an on-die power amplifier, by the way, and reportedly has been seen to operate in excess of 7 GHz.

Much of the work that went into moving the design from SiGe to CMOS is probably secret sauce at this point, but it would be interesting to explore. Particularly of interest would be how extensively Wisair used digital calibration and biasing techniques in the new radio design.