4.0 GHz read channel marks the way toward patterned-media disk drives, and maybe solid-state drives as well

LSI Corp. will push read-channel technology to a new speed level today with its introduction of a 4.0 GHz read-channel IP core. The core has been test-chipped in 65nm TSMC CMOS, and is available for integration into a drive SoC at LSI.

Director of product marketing Gordon Paulus said that this was probably the last read channel developed for uniform-media, perpendicular-recording drives. The next step from here is on to either discrete-track media or bit-patterned media, depending on how bold the head/media vendor is feeling. At that point many of the signal characteristics coming from the read head change again, and new technology will be in order.

One interesting comment during the discussion was that LSI believes read-channel technology can be applied to solid-state, as well as to spinning, storage media. Paulus suggested that the increasing transfer rates and decreasing signal-to-noise ratios of NAND Flash arrays were making the signals coming from the NAND cell array increasingly similar to the signal from a read head, with similar decoding problems. It’s not just a matter of running the output of the cell through a sense amp and resynchronizing it any more—more a matter of extracting hard data from an ambiguous, continuous-time analog waveform.

Given the size of NAND Flash dice, integrating a read channel might not be all that improbable physically. The big challenge might be that with the exception of Samsung, which has both spinning and Flash storage groups, the Flash vendors don’t know a whole lot about read channel technology, or any other kind of signal-recovery processing, for that matter. This could get interesting.