Open SystemC Initiative releases analog/mixed-signal extensions standard

As the AMS content of SoCs has increased, the need for tools to deal with analog functions in an SoC design flow has increased as well. Nothing will replace SPICE as a transistor-level modeling language. But just as with digital circuits, there is a need for higher levels of abstraction for the analog blocks of SoCs. Language extensions for RTL languages VHDL and Verilog have met part of the need, but there is still a gap at the higher levels in the flow: between the primarily algebraic representations of transfer functions in MatLab and the more implementation-directed models of Verilog-AMS. OSCI has a working group focused on this issue, and today the group released Version 1.0 of its AMS standard.

The working group had previously released a reference manual and while paper on their work. But with the official release of the 1.0 standard you can now download the AMS Requirements Specification, Language Reference Manual, and a comprehensive User’s Guide that includes a primer on high-level modeling of analog and mixed-signal circuits.

The primer is worthwhile because the whole notion of abstract modeling of AMS needs a little further discussion. The AMS 1.0 standard is not a modeling tool but a set of semantics and feature descriptions that define the requirements for future tools. And those tools could be a ways into the future.

"This has been a user-driven effort," says OSCI president Mike Meredith. "If you talk with tool vendors you hear skepticism about the need for an AMS standard at this level. But if you talk with design teams, they are very clear on what they need."

That need, according to AMS Working Group chair Martin Barnasconi, is not for another tool for detailed modeling of tightly-coupled analog-digital interactions at the node level. It is for a tool with which to model interactions between analog and digital blocks at the transaction level. This goal has directed the architecture of the standard.

AMS 1.0 offers three different formalisms for modeling AMS blocks: Electrical Linear Networks (ELN), Linear Signal Flow (LSF), and Timed Data Flow (TDF). The first method, ELN, is what the working group calls a "conservative" model: that is, such models use differential equations that preserve Kirkhoff’s Laws at a node level. The second method, LSF, sill represents analog blocks with linear differential equations, but at a more abstract level. Instead of modeling terminals and nodes, LSF models ports and signals without conserving electrical laws. Both of these modeling techniques would rely on a linear differential solver for simulation. The third method, TDF, models a block as a sampled-data system using a technique similar to transaction-level modeling (TLM). TDF models would drive a scheduler, just as TLM models do.

All three types of modules connect, through their respective solvers, into the magic of the AMS architecture: the Synchronization Layer. This layer would provide loose coupling between modules of the three types, and would couple all three into the SystemC system model at transaction level. The trick, of course, is to synchronize the operation of the linear solvers with the transaction-based rest of the system, without having to do complete reruns of the solver each time a transaction occurs. That’s one of the problems the working group appears to have taken on successfully.

This capability should give architects the modeling tool they need for architecture-level decisions on systems with functionally significant analog content. Now it’s up to the EDA industry to develop an implementation.