IBM Research lays out its approach to 22 nm scaling: it's software, not EUV

The debate has raged over the best lithography solution for 22 nm ICs: is it more optical magic in 193 nm lithography? Is it extreme ultraviolet (EUV) lithography? Today IBM Research, in an announcement of a joint program with Mentor Graphics, gave one definitive answer: it is neither. "At 22 nm, we expect to be using virtually the same machines we will use at 32," stated Kevin Warren, director of design technology integration at IBM Research. "In place of new hardware, we will rely on a concept we call Computational Scaling." This is an enormously broad program within IBM that includes in its compass a new generation of resolution enhancement technology.

The program at IBM Research under the name Computational Scaling is nothing less than an attempt to model and optimize the entire process flow for each new design. The program envisions building a virtual process from process models and large-scale computational methods, leaning heavily on the mathematical abilities and massive-scale computing skills elsewhere within IBM. But the goal is not merely to model observed process data and to predict such things as variations, but to optimize the myriad of knobs across an entire process. This will require the use of a massively-parallel computing facility available to the team.

The vision is sweeping, but some of the specifics are equally significant in isolation. At the lithography stage, for example, Computational Scaling at last sets in place actionable goals for the 22 nm node. But it also admits explicitly that the industry can no longer wait for EUV. "I believe EUV will show up at some point," Warren said. "But I can say positively that it will not be at 22 nm. It might make it by the 15 nm node, but that is not a certainty. At this point, whenever EUV arrives, it will benefit from the ability of the research we are doing now to widen the process window."

The focus of the relationship with Mentor graphics is on computational lithography, and what IBM calls Source Mask Optimization. Like the current generation of optical proximity correction, SMO is a model-based approach to create patterns on the mask that will result in a correct shape on the wafer. But compared to today’s OPC, there are at least three new ideas.

The first, and most familiar idea, is that the models must include more than simply optical effects in the stepper. "Our approach is to model the whole process, at least through exposure, development, etch, and CMP," Warren said. "Then we can go back and take pieces out of the model that aren’t necessary to the accuracy of the results."

The second novel point is to explicitly link OPC to restrictive pattern sets. The idea here is to simplify the computing problem by not letting physical design teams create absolutely any shapes they can think of. Instead, Warren said, it appears possible to develop analytically, from the computational model, a limited set of patterns that would be sufficient to give physical designers the flexibility they need.

"If you do no OPC at all at 22 nm, the only pattern you can make is a grid," Warren pointed out. "At 22, numerical aperture is maxed out, k1 is as low as you can go. You need to compute patterns that will create the shapes you want. And you need to simplify that computational problem by limiting the number of shapes you are trying to achieve.

"This not only eases the enormous computational problem, but it also vastly simplifies the design rules for the physical design people," Warren emphasized. "We’d like to get to a simple list of things you can do, not a huge list of things you can’t." No one who has dealt with the explosion in design rules at 65 nm and again at 45 nm will have any doubt about the value of that.

Neither advanced OPC nor prescribed pattern sets is a new idea. The innovation here, as Warren describes it, is the link. "We believe the right thing to do is to analytically generate patterns from the process modes. This is a sort of space-search problem in which you successively limit the search space as you add criteria. IBM’s corporate strength in mathematical optimization techniques will be extremely valuable here."

The third point is to explicitly link the OPC to a new generation of illumination tools in the litho systems—what Warren called customizable illumination. "The idea is combined optimization of the light source and the mask," Warren explained. "We want to be able to optimize the mask pattern based on the best choice of an illumination configuration for the patterns on this particular mask." Such a customizable tool might allow a choice of on-axis, off-axis, or multi-source illumination at each mask layer.

These steps, taken together, may offer a number of benefits. First, they could make production lithography possible at 22 nm without unexpected breakthroughs. Second, they could reduce the number of layers that will require double-exposure. "We can’t eliminate multiple exposures altogether," Warren said, "but we can reduce the number of layers that require them." And the computational process could also give much tighter control of process variations. "One of the things we’ve learned is that by 22 nm, you can’t just look at the local area in attempting to model variations," Warren said. "Variability now comes from what’s going on across a larger area."

This last point has a huge implication for physical design teams. Even at 65 nm, process integration engineers, equipment providers and cell designers worked to keep all the issues related to process variations contained within the cell designs, so that ordinary place and route engineers didn’t need to deal with them explicitly. But that is no longer possible at 45 nm or 32 nm, Warren said. "By 45 nm, place and route teams are already seeing rule complexity in spades. We are trying to address that issue, while still giving the area scaling that justifies the move to 22 nm in the first place."

As a final point, Warren reemphasized the importance of Computational Scaling across the entire process flow, not just in isolated windows like lithography. In particular, he said, IBM continues to see issues with CMP that have to be included in the optimization. The method is not to build better and better point models, but to achieve scaling by optimizing across the model of the entire flow—an entirely different order of computational problem from just stitching together the process compact models and executing them.

And even the variables to be optimized are a matter of innovation. "What designers really care about is area and electrical parameters, not fidelity to shapes and critical dimensions," Warren observed. Optimizing to electrical parameters rather than geometric shapes or metrology data appears to pervade the thinking in the IBM Research project. And this may be the most fertile near-term area for the IBM-Mentor development. "We are still looking at this, but I would say that what you might call electrically-driven OPC more than likely will be part of the goal with our computational lithography work," Warren said.