Looking ahead toward 32 and 22 nm, from a maskmaker's viewpoint

Toppan Photomasks earlier this week announced that its Asaka, Japan facility had produced 32 nm masks that IBM had qualified. The mask process, jointly developed with IBM, also has a shrink version that can product 28 nm masks. The milestone was the occasion for a chat with Toppan CTO Franklin Kalk about the state of advanced maskmaking, the roadmap, and the implications for design teams.

Activity is already starting to pick up at 32 nm, according to Toppan, with a number of customers doing test chips now. Executive VP of sales and marketing Mike Hadsell says that he expects to see some of these customers moving to production 32 nm mask sets in the second half of this year. The 28 nm shrink node, he said, is tracking just behind, and there may be significant 28 nm activity by early 2010.

One reason the move to 32 seems to be going so smoothly might be the similarity, from the design team’s point of view, to the 45 nm node. The need for double-patterning at some critical layers might impose a few restrictions on physical design, but probably nothing major compared to the encyclopedia of design rules now in place. In fact, Kalk pointed out, some designers are already using a version of double-patterning—a complementary phase-shift mask followed by a cut mask—for dense random logic. So double-patterning in itself may not be such a big step for the design flow. It just means twice as many masks at critical layers, and hence more work for the mask shop and the fab.

The next big step in litho technology, if you’ve been following along, should be source-mask optimization (SMO), in which a computational algorithm scans the patterns in a layer, selects an optimized light-source pattern for that layer, and then optimizes the OPC features on the mask for that illumination pattern. This can get hideously complex mathematically, and requires special light sources in the scanners, but it might actually simplify things for the physical design team. In principle, SMO could improve feature-formation on the wafer so much that it could substantially reduce the lithography-induced variations, improve feature density, and relax design rules. But Kalk said that conventional wisdom is that SMO technology won’t be ready for the 32 nm node. "It’s probably for 22 nm," he said.

If there are big changes coming for design teams, Kalk speculated, they might start showing up at 22 nm. One possibility that is getting increasing attention is use of restricted design rules. By only allowing certain kinds of patterns on a layer—for instance, the so-called 1D rules that require all the lines in a layer to have the same orientation, without bends—you can vastly simplify the problems of the mask-maker and lithographer. But you may substantially complicate the problems of the cell designer and place-and-route engineers.

Another change that interests Kalk is the increasing flow of information in both directions between the physical design team and the mask shop. So far, he said, there has been a lot more discussion than action in this area. One example for which Kalk has some optimism is the notion of mask-aware design. By listening to some feedback about the mask-making process, he said, physical designers could make choices that could reduce mask-writing times—in one recent case, from two days to about 10 hours.

In principle, a lot of design-intent information should be flowing the other way as well. But often it is not. There are still stories, and not necessarily apocryphal stories, about the hours the mask writer and inspection system lavished on the bar code on a mask set. Ideally, there would be enough design intent provided with the GDS-II data that the mask shop could tell whether a shape actually belonged to a net, how critical the net was to the performance of the chip, and in our dreams, even whether the pattern as it existed on the mask would allow the chip to meet specifications. But this is nearly science fiction today.

Instead, in the absence of design intent data, mask shops are learning to infer the existence of devices and nets, Kalk explained. "We can now look at patterns across layers, identify nets, and even infer something about their criticality," Kalk said. "On the other end, we can infer what the printed image would be like, and even infer the etch profiles that would result from the pattern. So we are a ways toward the virtual fab idea, in which we could look at the masks and tell you about the finished wafer."

But even with these capabilities, the necessary close relationship between design intent, netlist understanding, physical design data and the maskmaking process is still less than guaranteed. "There is still no formal information flow," Kalk said. "You have to have a close person-to-person relationship between the OPC team and the mask shop." That is the kind of relationship that makes an early move to 32 nm a reasonable bet. But we cannot count on such relationships to allow the whole industry to keep moving down the roadmap.