Synopsys pulls together its verification platforms

Synopsys announced this morning that it has integrated a number of diverse verification products, including recent acquisition Chipit, into an expanded version of their Confirma platform. As it is described, Confirma will now integrate the company’s HAPS FPGA prototyping boards, Chipit FPGA emulation boxes, and much of the FPGA and ASIC-verification software from Synplicity into a single interoperating environment. Unlike some integration attempts that include little more than rebranding, the Synopsys effort appears to provide the right interfaces to substantially increase customers’ efficiency during certain phases of verification.

The headline change here is adding the Chipit boxes to the product line. Synopsys director of product marketing Juergen Jaeger said that Chipit brings an emulation capability that complements the capabilities of the widely-used HAPS boards. The Chipit boxes are essentially FPGA arrays with programmable interconnect between the chips and software that supports a transaction-based approach to RTL verification and debug. Depending on the design, they can provide emulation at 10 to 50 MHz.

As important as the hardware platforms are the software tools. Chipit comes with its own supporting software. Synopsys has integrated these tools with Synplicity’s Synplify-Premier, Certify, and Identify-Pro software packages, all of which now work with both the Chipit and HAPS hardware.

The third major advance in Confirma is interfaces. To begin with, there is the physical UMRbus, based on PCI or PCI-express, that connects the Chipit box to the user’s workstation. Using this physical layer are three software interfaces. HDL-Bridge is a link to Synopsys’s VCS environment, allowing cosimulation between the Chipit world and RTL simulation. An industry standard SCE-MI (Standard Co-Emulation Modeling Interface) attaches the Chipit box to the Synopsys Innovator system-level modeling environment. And a collection of programming interfaces connect the box to C, C++, and TCL code on your workstation.

All of these software simulation or execution environments remain resident on your workstation, linked in cosimulation with the RTL environment on the Chipit box. Thus it is possible to do system builds and emulation/simulation while the various blocks of the system exist at quite different levels of abstraction. Meanwhile having the HAPS boards–with their extensive suite of interface daughterboards–in the same environment means that you can test critical hardware interfaces with RTL stubs or trial blocks in the HAPS environment in real time.

Taken together, these capabilities appear to represent quite a step forward for productive verification, particularly in the phases where some blocks require detailed RTL exploration with long data streams, while others require wringing out of real-time I/O, and yet others are still in a conceptual stage. Needless to say, aside from being valuable for system verification and debug, the environment should be a huge relief for software developers.