Ubiquitous interfaces

It doesn’t matter where you look, interfaces are an important part of what we do. At the chip level, there are interfaces between the blocks, interfaces between the chip and the outside world, interfaces between digital and analog, interfaces between the electronics and humans. When we look at EDA tools, we again see a plethora of interfaces but they take on several new dimensions. We have interfaces between tools, between models, between abstractions and between platforms. I have often heard complaints from the customers of EDA tools that these interfaces are often too unwieldy, or that it takes too much time to build interfaces between them or that there is just not enough consistency in them.

Within Accellera, I chair one committee that is actually called the Interfaces Technical Committee. The objective of that committee is to build interfaces primarily intended to couple simulators and testbenches to emulators or other hardware-assisted verification technologies. It sounds totally boring but it is an interesting exercise in building an interface that can bridge two very different compute platforms (hardware assisted verification and general purpose computing) that execute models at different levels of abstraction (transaction level and RTL) and are usually written in different languages (C,C++,SystemC, and SystemVerilog or VHDL). Most of the time we attempt to piggy back on existing standards such as the SystemVerilog DPI. We identify the subset of the standard that can provide useful functionality and can be synthesized for use on a hardware platform and then provide a layer on top that will add user level capabilities and thus hide many of the implementation-level details.

Earlier this year we noticed a number of other Accellera committees were working on interfaces and we thought it might be a good idea to see if we could work cooperatively with them in their drafting stages to ensure that our, and ultimately the end user, needs were taken care of. The problem is that we are a very small committee and some of the others have much larger resources and participation. So we decided to take another approach and expressed our concerns to the Accellera board. This month, the chairs of many of the Accellera committees had a joint meeting and one of the major things on the agenda was to increase the awareness of the interface issue. As part of that we identified nine interfaces that were currently at various stages of development within Accellera and Shispal Rawat (Chairman of the Board for Accellera) stated that the board wishes to take a more holistic approach to interfaces and they were continuing to drive this discussion at the board level. It is too early to say what the outcome will be, but I am very happy to see that the awareness of the problem has been raised and that this may lead to better definition of interfaces in the future. Interfaces may not be sexy but bad interfaces or too many interfaces can bog us down in needless work.