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ESL: The value of abstraction

December 7, 2011

I know I am as bad as other proponents for ESL, saying that abstraction is the key to almost everything and provides additional productivity, the ability to handle greater complexity, simulations run orders of magnitude faster, in fact the list of advantages is almost endless. But how often do we stop and question why this is the case and what could go wrong?

Let’s start in the land of digital because the story here is so much easier compared to analog. First we worked with polygons. Each layer of each material was laid out by hand. Things became a whole lot easier when digital types of transistors became the new level of abstraction. This was possible because the abstraction was consistent. The likelihood of problems at the polygon level was small and the transistor models could be well characterized.

When transistors are combined into gates, the abstraction becomes even stronger in that gates are essentially independent and as long as we follow fan-out types of rules, we can ignore almost all of the lower level effects. Another move up to RTL and again the abstraction holds for all but a few corner cases - well until a few years ago when changes in the process node have caused some breakdowns. Those can be the discussion of a future blog, but the fix was that some of the “abstractions” had to change in that physical effects had to be considered in the RTL and gate level synthesis process. The tools handled this breakdown of the abstraction such that they appeared to hold true for most cases.

There are a few things happening right now: a move to a higher level of abstraction, power becoming more important and analog gaining in importance. Let’s briefly look at each of those.

Higher levels of abstraction

High-level synthesis takes an untimed model and uses a synthesis process to create an RTL model. A difference between this and previous changes in abstraction is that functionality between the high-level and the RTL model can change due to changes in timing. From RTL downwards this would be considered an error, but for high-level synthesis that is one of the ways in which the synthesis process can be adjusted as the micro-architecture of the solution is selected. Those changes in timing, in the order of multiple clock cycles, can change when asynchronous events happen and there is no other quantum (such as a clock edge) that can be used to align them as was the case at the RT level.

Power

Power used to be a secondary consideration that was adjusted at the back end. That was before power became a primary design consideration.  Power does not scale in the same way. High-level decisions can have a large impact on both the total amount and the types of lower level optimizations that can be done. Power is more like test circuitry in that it has to be built in orthogonally to the main functionality while being controlled by high-level functionality. It is difficult to estimate power at the high-level without knowing what detailed design decisions will be made, so we have to rely on fidelity of models rather than accuracy of models and this is something the industry has less practice with.

Analog

The days of analog/digital separation are over. They now coexist on the same chip and can have significant impacts on each other. To call them oil and water is not an unreasonable comparison. At the same time, analog has never had the same success with abstraction as digital. It has not been possible to place transistors without considering layout let alone high-level functionality and analog synthesis. But recently I have seen some encouraging advancements. Mentor introduced some technology into its Caliber product that can do some intelligent rule checking for common analog combinations of transistors and Magma just the other day introduced some capabilities that combined functional and physical parts of an analog flow. Maybe the days of some successful abstractions in analog are around the corner, at the same time as some of the abstractions of digital are breaking down.

May we live in interesting, or should I say abstract, times.

Posted by Brian Bailey on December 7, 2011 | Comments (5)

December 9, 2011
In response to: ESL: The value of abstraction
Brian Bailey commented:

Fidelity vs accuracy. Accuracy is an absolute. How close is an estimate to the actual. Fidelity is relative. If I have two possibilities and I tell you one is better than the other, then I had better be right. Neither result may be highly accurate but I can trust the decision.


December 8, 2011
In response to: ESL: The value of abstraction
tomt commented:

define fidelity vs model accuracy.


December 7, 2011
In response to: ESL: The value of abstraction
Brian Bailey commented:

Sorry about that. I talked about that very definition in my previous posting:
www.edn.com/blog/Practical_Chip_Design/41440-The_problem_with_the_definition_of_ESL.php


December 7, 2011
In response to: ESL: The value of abstraction
richardl commented:

Ditto davidhil comment. How about defining terms.


December 7, 2011
In response to: ESL: The value of abstraction
davidhil commented:

What is ESL? I mean, other than equivalent series inductance...

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