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Shrinking NAND densities toward oblivion

April 25, 2011

On April 14, Intel and Micron Technology first officially announced their completion of the industry’s smallest NAND flash process technology at 20 nm. According to the press release, the “20-nm 8GB device measures just 118-mm-sq and enables a 30 to 40% reduction in board space (depending on package type) compared to the companies’ existing 25-nm 8-GB NAND device.”

The companies don’t expect the new 20-nm 8-GB MLC NAND to enter quality mass production until at least the second half of 2011. At that time, Intel and Micron will also most likely unveil samples of a 16-GB device, which will allow the creation of 128-GB of capacity in a just single solid-state IC that is smaller in size than a postage stamp.

This all translates to additional space for the all too important improvements that help draw in consumers to new portable products, including a larger screen, a bigger battery pack, or addition chips to handle increase functionality. But this also means new generations of SSDs (solid-state drives) that can pack in double the capacity of current ones, meaning more even more music, pictures, video, data, and books on new smartphones, laptops, tablets, readers, or whatever they can dream up next to compete with the iPad.

This benefits the consumer first and foremost. Smaller process nodes drop the cost of NAND, which ultimately lowers the cost of SSDs, meaning you get more bang for your buck. In the past we could expect a price reduction in SSDs of upwards to 50% with a new generation of flash, but with the changeover from 25 nm to 20 nm, a more conservative price estimate will likely fall in the range of 20 to 30%.

This is also obviously a good move on behalf of both firms, who have operated a successful NAND joint manufacturing venture called IM Flash Technologies for several years now. The duo is also seeking to retake the technology lead back from Toshiba’s joint venture with SanDisk, who until this point, were the process technology leaders in the NAND market with a 24-nm NAND line. Meanwhile the top Korean players, Hynix and Samsung Electronics were also separately ramping up their own 2x-nm-class devices, which will most likely begin at 27-nm and then decline to either 22-nm or 20-nm. With firms like Samsung and Toshiba obviously having the edge in total production capacity, this technology leg up over the competition may prove invaluable for the firms in the upcoming months.

Even so, in order to create the 20-nm Intel and Micron have pushed the very limits of the double patterning technology (DPT) used to make flash memory for years now. Eventually, all nanotechnology must come to face its limits, and Micron, Intel, and Toshiba have said that NAND processing will soon be approaching that wall in around five years or less. So, at least in the meantime, the race to shrink flash continues. However, eventually somebody will have to find a viable replacement or risk getting left in the dust.

Posted by Matt Scherer on April 25, 2011 | Comments (0)
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