Michael Santarini
I'm Michael Santarini, and I cover EDA, IP, ASICs, programmable logic, and memory for EDN. I joined EDN in January 2005, after seven years at EE Times, where I specialized in reporting on IC and system-design tools and methodologies, covering the EDA and IP industries and their impact on FPGA, ASIC, and printed-circuit-board design.
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