News
Researchers explore nonvolatile resistive RAM as flash replacement 11/13/2008
Researchers are leaving no stone unturned in their attempts to find an alternative nonvolatile-storage mechanism that can scale to processes smaller than 32 nm—the point at which, many fear, flash may run out of gas.“Crystal” oscillator comes without the crystal 10/30/2008
Silicon Laboratories is offering a new class of oscillator as a frequency reference. The all-silicon Si500 series uses neither a MEMS (microelectromechanical-system) frequency system nor a crystal, but it challenges crystal oscillators in the high-volume-frequency-reference sector. After you order the compensated-LC oscillators, you receive samples within two weeks with a minimum order of 75 un...Cadence, Tessera team to optimize illumination for 22-nm lithography 10/8/2008
Using diffraction masks in the stepper's light source to create custom illumination patterns, the companies claim a substantial opening of the process window.TI driving development, ratification of IEEE 1149.7 embedded system standard 9/2/2008
To allow developers to easily test and debug products with complex digital circuitry, multiple CPUs and applications software in products such as mobile and handheld communication devices, Texas Instruments Inc, a key member of the IEEE working group, said today that it is spearheading the effort to ratify the IEEE 1149.7 standard, which is a new two-pin test and debug interface standard that supports half the number of pins of the IEEE 1149.1 technology.Agilent, NVIDIA accelerate signal integrity simulations 8/27/2008
To accelerate signal integrity simulations faster than previously possible, Agilent Technologies Inc said Tuesday afternoon that it is working with Nvidia to develop a commercial software release of a GPU-enabled Advanced Design System Transient Convolution Simulator, based on Nvidia’s Compute Unified Device Architecture-based GPU.In-Depth
Multicore: the future of SOCs? 10/30/2008
Will systems on chips follow server CPUs down the road to having many identical processor cores on a die?A turn-off: Power management complicates life for verification engineers 10/16/2008
Advanced energy-saving techniques can cause vast difficulties in the verification process.Lithium-ion-battery-charging IC powered by charge-transfer, control innovations 10/1/2008
The IC Insider: Reverse engineering the Maxim MAX8814ETA 28V linear lithium-ion battery-charger IC.Silicon germanium: fast, quiet, and powerful 9/18/2008
SiGe processes can give analog-circuit designers fast, high-voltage transistors with low noise, whereas BiCMOS SiGe fits into CMOS process flows.Handcrafted analog gets automated assist 9/4/2008
EDA tools address simulation, verification, and layout for mixed-signal designs.Experts
Making ASICs Gel 11/18/2008
The enormous complexity possible in ASICs today has had a damping effect on design starts. Many in the industry simply can’t afford to design the chips their customers want, and that their foundries can easily fabricate. We postulate a design flow that, by focusing on identifying the customer’s behavior-level requirements and mapping them onto a proven platform, reduces design complexity and breaks the logjam in ASIC designs.Tech innovation addresses societal, environmental challenges worldwide 11/13/2008
Intensive research and development in nanoelectronics and nanotechnology is critical for tackling societal and environmental challenges facing the world today.Third-party IP: placement, blocks, and clocks 10/30/2008
Tapeout: Questions to ask IP providers regarding placement, rotation, embedded blocks, and clocks.IP selection and power supplies 8/21/2008
The failure to fully embrace just one of the two competing power-analysis standards has caused confusion and uncertainty among IP users about power-strategy compatibility.ESL: The state of the industry and what’s next? 8/19/2008
GUEST OPINION: While ESL continues to remain in its infancy, there are signs in the industry that point towards eventual mainstream usage, however the scope of what is needed has to be more inclusive of the entire system-level design and verification flow.DesignIdeas
