di2849l1.txt
;********************************************************************
; 
; LISTING 1 - 16c54 NUMERICALLY CONTROLLED OSCILLATOR-EMULATION ROUTINE
;
; "Microcontroller emulates numerically controlled oscillator," EDN, Feb 21, 2002, pg 92
;
;********************************************************************

STRT    MOVLW    0
        TRIS     PORTB        ;Set port B to output
        MOVWF    PHASL        ;Initialize phase
        MOVWF    PHASM
        MOVWF    PHASH
        MOVWF    ZER          ;Constant = 256
        MOVLW    64
        MOVWF    MAX          ;Constant = 64

; Set up default frequency, here 1000 Hz

        MOVLW    64
        MOVWF    FREQL
        MOVLW    150
        MOVWF    FREQM
        MOVLW    1
        MOVWF    FREQH

        GOTO     DONE

; Set up fixed return address in stack

RETX    CALL     RETY
        GOTO     LOOP         ;Start generating output

RETY    RETLW    0            ;Dummy to fix return address

DONE    CALL     RETX         ;Set up fixed return address

; Look-up return reenters at this point with sine sample in W

LOOP    BTFSC    TEMP,INV     ;Test if inversion needed
; Replace previous instruction by BTFSC PHASH,INV
; if BPSK modulation not needed.
        SUBWF    ZER,0        ;Invert output
        MOVWF    PORTB        ;Output sample

; Check if user wants to load a new frequency
        BTFSC    PORTA,DAT    ;Test for change flag
        GOTO     NEW          ;Get new user frequency

; Three-byte addition of control to phase accumulator
        MOVF     FREQL,0      ;Get frequency low byte
        ADDWF    PHASL,1      ;Increment phase low byte
        MOVF     STATUS,0
        ANDLW    1            ;W = carry
        ADDWF    PHASM,1      ;Add carry
        BTFSC    STATUS,CY    ;Skip if no carry
        INCF     PHASH,1      ;Propagate carry
        MOVF     FREQM,0      ;Get frequency mid byte
        ADDWF    PHASM,1      ;Increment phase mid byte
        BTFSC    STATUS,CY    ;Skip if no carry
        INCF     PHASH,1      ;Propagate carry
        MOVF     FREQH,0      ;Get frequency high byte
        ADDWF    PHASH,1      ;Increment phase high byte

        SWAPF    PORTA,MOD    ;Modulation input to bit 7
        XORWF    PHASH,0      ;XOR inversion bit
        MOVWF    TEMP         ;Save inversion bit
; Remove above three instructions if modulation not needed.

        MOVF     PHASH,0
        ANDLW    63           ;Get table index
        BTFSC    PHASH,REV    ;Test if reversal needed
; Replace above instruction by BTFSC TEMP,REV for QPSK

        SUBWF    MAX,0        ;Reverse index direction
        ADDWF    PC,1         ;Jump to table

; Partial sine look-up table
; 65 entries = sines of first quadrant

        RETLW        128
        RETLW        131
        RETLW        134
        ;
        ;
        RETLW        255