di3030.txt
;**************************************************************************************************
;
; LISTING 1 - AHDL CODE FOR REVISION DETECTION
;
; "PLD code reveals pc-board revisions," EDN, October 17, 2002, pg 102
;
;**************************************************************************************************

% TITLE rev_detect.tdf: AHDL file						%
% path: f:\project3\altera\rev_detect.tdf				%
% (c) 2002 Bolton Engineering, Inc. All rights reserved	%
% size of 16 LCs in 1K10-3, 185MHz clk operation		%
% 02/18/02. Code started, tested, and entered into RCS	%

INCLUDE "lpm_counter.inc";

PARAMETERS	(
	LPM_WIDTH	= 5,	-- in bits; sets the length of time for detection
	CHANNELS	= 1		-- number of strap inputs (1 or more)
);

SUBDESIGN rev_detect
(
	clock					:	INPUT;		-- global clk
	aclr					:	INPUT;

	revi_in[CHANNELS-1..0]	:	INPUT;		-- strap inputs for all "inputs"
	revi_en					:	OUTPUT;		-- tristate enable

	revo_out				:	OUTPUT;		-- strap output
	revo_en					:	OUTPUT;		-- tristate enable

	q[CHANNELS-1..0]		:	OUTPUT;		-- 1 if connected, 0 if N.C.
	complete				:	OUTPUT;
)
VARIABLE
	phase_cntr				:	LPM_COUNTER WITH (	LPM_WIDTH     = 2, 
													LPM_DIRECTION = "UP");
	seq_cntr				:	LPM_COUNTER WITH (	LPM_WIDTH     = LPM_WIDTH, 
													LPM_DIRECTION = "UP");
	dffe_q[CHANNELS-1..0]	:	DFFE;
	complete_unr			:	NODE;
BEGIN
	-- at 0, drive strap "inputs" only
	-- at 1, drive nothing
	-- at 2, drive strap output only
	-- at 3, drive nothing
	phase_cntr.clock	= clock;
	phase_cntr.aclr		= aclr;
	phase_cntr.cnt_en	= !complete;

	revi_en		= DFF( (phase_cntr.q[] == 0) OR complete, clock, !aclr, VCC);
	revo_en		= DFF( (phase_cntr.q[] == 2) OR complete, clock, !aclr, VCC);

	seq_cntr.clock		= clock;
	seq_cntr.aclr		= aclr;
	seq_cntr.cnt_en		= !complete_unr AND phase_cntr.cout;
	complete_unr		= seq_cntr.cout;
	revo_out			= seq_cntr.q[0];
	
	complete			= DFF(complete_unr, clock, !aclr, VCC);

	FOR i IN 0 to (CHANNELS-1) GENERATE
		dffe_q[i].clk	= clock;
		dffe_q[i].prn	= !aclr;
		dffe_q[i].ena	= revo_en AND !complete;
		dffe_q[i].d		= dffe_q[i].q AND (revi_in[i] XNOR revo_out);
		q[i] 			= dffe_q[i].q;
	END GENERATE;
	
END;