Swimming in the channel
Chip and system-interface design changed radically when electronic systems began to use high-speed serial channels. Serial links in high-speed buses, such as SERDES (serializer/deserializer), DDR2/3, PCI (Peripheral Component Interconnect), and USB (Universal Serial Bus) 3.0 systems, operate at rates faster than 1 Gbps. Engineers first used these links in supercomputers, communication backbones, and PCs; now, even consumer products have high-speed serial channels. Operating at gigabits per second, digital signals have entered the analog domain. A signal may never reach logic one, or it may substantially overshoot that value after traversing an IC package, a PCB (printed-circuit-board) trace on FR4 (fiberglass-reinforced 4), connectors, and cables. The signal may fall short of logic zero, or it may undershoot ground levels.
“In serial links, things like vias and via stubs become very important,” notes Ken Willis, a product-marketing manager at Sigrity. “Things you don’t really care about below a gigahertz make a very big difference above a gigahertz.”
Signal-integrity problems in high-speed serial links can come back to bite even the most experienced designers. You can’t troubleshoot a serial channel with repetitive signals such as square waves because the signals’ data pattern affects signal fidelity. You must instead stimulate the channel with a PRBS (pseudorandom binary sequence) to shake out any data-dependent problems or ISI (intersymbol interference). You then look at the resulting waveforms overlying each other to form an eye diagram (Figure 1).
“People who use rule-of-thumb approaches and then go right to prototype tend to be short-lived in their jobs,” notes David Wiens, a business-development manager at Mentor Graphics. You need sophisticated software to simulate the channel and the companion software to extract and make simulation models of the link components (Figure 2). That extraction must come from the best serial-data oscilloscopes and VNAs (vector network analyzers) you can find.
Once the link is working with acceptable BERs (bit-error rates), you must ensure that the links do not interact with crosstalk, which causes new problems. When you have the entire system working, you must ensure that your system’s high-speed signals don’t emit too much radiation, which will cause the system to fail FCC (Federal Communications Commission) RFI (radio-frequency-interference) and EMI (electromagnetic-interference) approvals. According to Steven McKinney, a business-development manager at Mentor Graphics, 90% of companies without simulation capability must do a re-spin or use another approach to resolving their compliance problems. Omitting one board spin or preventing a late-to-market situation often pays for the entire cost of an advanced signal-integrity tool.
Evaluating the signal integrity of a serial link involves the difficult task of measuring signal integrity on a lab bench with real hardware. The channel speeds are so high that you must be careful that the probe you are using does not introduce its own loading and signal-integrity problems. In addition, the wires of the link give you an eye diagram, but that diagram is meaningless if you don’t use the same equalization as the receiver chip does to process the signal. For this task, you need sophisticated serial-data analyzers from such vendors as LeCroy, Tektronix, Agilent, and Anritsu.
Your problems continue once you begin to use software simulators. The software must model lossy transmission lines well enough for use at high speeds. Chip models must have the IBIS (input/output-buffer-information specification) AMI (algorithmic-modeling interface) to model the output driver and input receivers and the effects of equalization and pre-emphasis. The IBIS models comprise tables of time-based behavioral descriptions of a transmitting pin—similar to the way in which S (scattering) parameters comprise tables of frequency-domain behaviors of multiport systems. Executable code can represent AMI, an advanced function of the model. Thus, a chip company that has spent millions of dollars developing a sophisticated equalizer for a receiver chip or a pre-emphasizer for a transmitter can represent those algorithms in a protected, encrypted executable file that protects the intellectual property in the chip. This feature allows you to plug the model into a signal-integrity package or an advanced oscilloscope or network analyzer to learn the performance of the channel, including the equalization the chips produce.
You can easily simulate the properties of a differential pair on a lossless FR4 PCB. Unfortunately, however, signal-integrity problems require you to simulate dozens or hundreds of pairs and examine them not just for their intrinsic performance but also for the effects the channels have on each other. You may also have to model the effects of nearby power supplies or other fast digital signals. The software must solve the signal-integrity simulation using both time- and frequency-domain techniques; the tool then must apply statistical analysis to predict how jitter and crosstalk will affect the BER, EMI emissions, and RF immunity of the channel (Figure 3).
Signal-integrity software can help you in both the prelayout and postlayout processes, often removing risk from your product. During prelayout, the software can help you keep the channels performing to specification without radiating excessive noise. These techniques can help you make design choices, such as selecting package pinouts or connector-pin assignments, which will save you major headaches at the end of the project. When performing a prelayout analysis, you must ensure that the virtual prototype of the channel is valid and that you have accounted for expected trace lengths and board-dielectric properties. A sophisticated prelayout tool takes into account the algorithms in the chips, so you must perform a lot of experiments with any programmable settings in the virtual chips to maximize the performance of the channel.
Once you use signal-integrity software in a prelayout mode, you can delve into the board layout. You then send the layout data to the signal-integrity tools, which can predict the performance of the serial channels, the effects of the channels on neighboring circuits, and the approximate EMI radiation that your design will produce. High-end signal-integrity programs account for crosstalk between signals and the effect of power integrity on the signal.
Signal-integrity tools act as field solvers (Reference 1), which use the physical configuration of a system and solve Maxwell’s equations to predict the voltages and currents in the copper traces (Figure 4). A 3-D field solver can model the traces, wires, boards, and tin covers of a complex design, simplifying the task of using a field solver for small RF circuits and modules. A computer can often perform the huge task of solving the 3-D equations in minutes or hours. Serial channels, however, often reside on large PCBs with hundreds or even thousands of signals to account for. It would take weeks or months to solve a large board with a 3-D solver.
Signal-integrity software for 3-D field solvers makes the necessary simplifications to yield an answer in a reasonable amount of time. However, you risk an incorrect answer if you let the software use the wrong assumptions or if you do not understand the limitations of the program. You can use an inexpensive 2-D field solver to tell you the behaviors of signals in flat PCBs. The program can model vias as capacitive discontinuities in transmission lines, a good approach for slow channels. A via has a more complex effect on a signal at speeds greater than 6 Gbps, however. At those speeds, the via is close to other copper, and its physical configuration matters, as do the layers at which the signal enters and exits. For these high-speed channels, you need a 2.5- or 3-D solver. Sophisticated tools, such as Sigrity’s Channel Designer, use a 3-D solver for the vias and connectors and use 2-D techniques for traces on a plane to minimize design time.
The trade-off between computational speed and the accuracy of the result is a fundamental consideration in the selection of a signal-integrity tool. If you expect all your simulation to pertain to a 5-Gbps channel, you need software that can solve the subtle problems, including lossy dielectrics and 3-D effects, that this scenario implies. A low-power supply on the chip transmitting the serial data may also translate into poor serial-link performance. For that reason, Sigrity’s Channel Designer software accounts for the effects of the channel’s power system and the difference in chip performance over temperature to give you a better understanding of channel performance in real-world conditions.
You cannot feed a tool incorrect models and expect it to produce accurate results. Incorrectly modeled system blocks may exhibit passivity problems, which occur due to the component’s or module’s energy storage, or causality problems, which occur when you use the frequency domain to present scenarios. You can use signal-integrity software to apply an impulse function to frequency-domain models. If any aberrations or artifacts occur before the rising edge of the response, the model has causality problems, and you should investigate its validity. For this reason, models you extract with time-domain reflectometry may cause you fewer problems because they rarely yield causality problems (Reference 2).
Mentor Graphics’ HyperLynx is the best-known signal-integrity tool and has the biggest market share (Figure 5). Mentor has integrated HyperLynx into the PADS and Expedition board-layout packages, and it also works with Cadence’s OrCAD and Allegro board packages, as well as those from Zuken and Altium. Altium also offers a board-layout tool that performs prelayout evaluation in the schematic editor and postlayout analysis in the PCB tool. These results tell you whether a trace has overshoot or undershoot and whether it affects a neighboring trace. In contrast, HyperLynx lets you evaluate an eye pattern and provides models of in-chip equalizers and other algorithms that plug into the tool with IBIS AMI.
According to Leslie Landers, vice president of sales and marketing at Sigrity, 10 years ago, you could only use a detailed 3-D field solver to look at a via or a bond wire or use a simulator that made simplifications that don’t work in high-speed designs. Modern tools, in contrast, perform full 3-D simulation of connectors, vias, and bond wires and use faster 2-D simulation to simulate the traces on a PCB. Sigrity software can provide for the effects of the power bus on signal integrity, and other tools, including those from Sigrity and NEC, perform power-integrity analysis.
Sophisticated tools, such as those from Mentor and Sigrity, can also simulate ISI. Because the wavelength of interest is short for signals operating at 5 or 10 Gbps, you need only a few centimeters of trace length on your PCB or backplane for several of those waves to reside simultaneously on the channel. The reflections and transitions change due to the interaction of those waves. Thus, a high-end signal-integrity tool lets you excite the channel with a pseudorandom binary pattern and then collect data about the resulting eye diagram. Altium’s signal-integrity tool is useful but has fewer features than HyperLynx because it is free when you purchase the $4000 Altium design platform. A fully loaded, stand-alone version of HyperLynx, on the other hand, costs almost $50,000.
Although Mentor, Cadence, Zuken, and Altium have used their experience in board design to develop signal-integrity tools, you can also obtain good tools from other sources. Several companies make field solvers and signal-integrity tools. Ansoft, second only to Mentor in market share, uses its expertise in mathematical computation and plotting to help engineers solve signal-integrity problems. Ansoft’s flagship product, HFSS (high-frequency structural simulator), is a general-purpose field solver that also allows Spice modeling for S parameters and matrix solvers. Ansoft’s DesignerSI software includes schematic-capture and layout tools, a 2-D field solver, and the statistical and IBIS capabilities needed to design a serial link (Figure 6). Ansoft also offers SIwave to extract models from board and package geometry.
SiSoft, an early champion of the IBIS AMI standard, offers the Quantum-SI field solver, which performs both prelayout and postlayout signal-integrity analysis. SiSoft also offers the Quantum Channel design environment for high-speed serial links. SiSoft’s tools model algorithms and equalizations in transmitter and receiver chips and perform automated compliance testing to tell you whether your channel will comply with a given interface standard, such as PCIx (Peripheral Component Interconnect Extended) or IEEE 802.3xx. The program interfaces with several board programs, including Mentor’s Expedition PCB and programs from Allegro, Altium, and Zuken. Many field-solver programs, including those from Comsol, Sonnet Software, CST, and E-System Design, also handle calculations for signal integrity. Most large field-solver companies offer 3-D programs that accurately model connectors and bond wires. Modeling a large PCB in 3-D is often time-consuming, however.
Because signal-integrity problems manifest themselves at high frequencies, RF-design-tool companies have stepped up to help engineers with signal integrity. Agilent, for example, offers both the EMDS (electromagnetic-design-system) and the ADS (advanced-design-system) field solvers. ADS comes with signal-integrity plug-ins that let you visualize fields and currents in 3-D. Agilent also recently added support for IBIS AMI models. AWR’s Microwave Office, meanwhile, touts ease of use and an intuitive interface; the company also offers signal-integrity tools, such as the SI Design Suite, which can help with 2- and 3-D analysis.
“Many companies are asking their RF engineers to help with signal-integrity and EMI issues,” says Sherry Hess, vice president of marketing at AWR. “It is only natural that those engineers prefer to use the RF-design environments they are used to.”
Joining board-layout-, field-solver-, and RF-tool vendors, mathematical-analysis companies, including The MathWorks, can also help with serial-channel signal-integrity problems with tools such as Matlab. Matlab’s toolboxes include series of application-specific mathematical functions, according to Giovanni Mancini, marketing manager for RF and analog products at the company. Tools such as ADS and Microwave Office generate simulations of lumped-element models, and Matlab uses those models to analyze the channel model. You can use the statistical capabilities of Matlab to predict BER. Matlab is also useful in developing the filter algorithms for the equalization functions in the receiver chips.
“Engineers use Matlab at different stages of the design and characterization phase,” says Chris Aeden, manager of the marketing group for signal processing and communications at The MathWorks. “The communications toolbox allows engineers to enter and test data waveforms to evaluate those filters.”
Chip companies can also help designers address signal-integrity problems. “We provide tools so that you can do analysis before finishing the layout and tools for after you do the layout,” says Oliver Tan, a senior product-planning engineer at Altera. One such tool, the SSN (simultaneous-switching-noise) estimator, works during prelayout to model the SSN that inductive crosstalk generates.
The SSN-analyzer tool works during postlayout to help you evaluate signal integrity and choose the FPGA’s pinouts. “Even low-end products are using 1 to 3-Gbps links,” says Phil Simpson, senior manager of technical marketing at the company. “The problem changes significantly as you get to higher data rates.”
Mentor Graphics, Zuken, and Cadence point out that their signal-integrity tools work within their PCB-design flows. Remember, however, that those integrated tools often started out as separate or point tools that these companies purchased and then integrated into their flows. “A function is not truly integrated unless the entire flow works off the same database,” says Gerry Gaffney, regional chief executive officer at Altium. Hence, it is important to select the signal-integrity tool that best serves your needs.
Sigrity’s Willis notes that the company doesn’t want to compete with PCB tools such as Expedition and Allegro but ensures that Channel Designer works well with those and other PCB tools. He contends that the availability of a point tool allows the company to concentrate on signal-integrity problems, as the advanced performance of Sigrity’s software demonstrates.
A signal-integrity tool must use an entire arsenal of techniques to keep the sharks at bay. The tools for high-speed channels must perform both 2- and 3-D field solving, as well as matrix computations with Spice. The tools must also evaluate time-domain performance employing the S parameters of the modules in the channel and provide data-analysis capability to help you infer the BER from a given jitter or crosstalk simulation. “A lot of designers aren’t educated in signal integrity at all,” says Altera’s Simpson. “They need tools to tell them whether the design will work.” Achieving that goal demands the best software you can get.