Flying capacitor and negative time constant make digitally programmable-gain instrumentation amplifier
Numerous and evil are the forces of darkness that conspire to frustrate accurate analog-to-digital conversion of wide-dynamic-range analog signals. Among these gremlins lurk common-mode-voltage noise and signal amplitudes too variable to fully use ADC-input span and conversion resolution. Proven charms against common-mode noise are differential inputs, and you can exorcise variable signal amplitudes by implementing digitally programmable gain. DPGIAs (digitally programmable-gain instrumentation amplifiers) combine both useful features (Figure 1).
Figure 1 The behavior of the RC topology is still simple when you replace the resistors with an active circuit that synthesizes a negative resistance.
Microcircuit—even monolithic—DPGIAs, such as the Linear Technology LTC6915, are available. But this Design Idea describes a DDENT (differential-divergent-exponential-negative-time-constant) DPGIA employing the concepts of the “flying”-capacitor differential input and the DDENT curve, which provide an interesting alternative.
You control DDENT operation with the amlify/ track -bit mode. Track mode connects flying-capacitor C to the positive and negative differential-input terminals, which acquire the input voltage, VIN. The transition to the amplify mode isolates C from the input and initiates regenerative negative-time-constant exponential amplification of the input voltage. From that point (Reference 1) until the moment when a connected ADC ultimately samples and converts the output voltage, VOUT/VIN is a divergent exponential function of time: gain=2(t/10 µsec+1).
Building on the assets of that earlier design, this new circuit features CMR (common-mode rejection) that neither resistor-network matching nor the CMR of the op amp limits. Stray-capacitance issues impose the only limits, but you can minimize these issues with careful circuit layout. The circuit has rail-to-rail inputs, virtually unlimited programmable gain, and gain-set resolution that only the resolution of the amplify-interval timing limits. The circuit also has settling time 10 to 100 times faster than that of the exemplary LTC6915 and ±10V output-amplitude capability—two to four times greater than that of monolithic DPGIAs. Besides the inherent dc accuracy of the op amp you choose, the accuracy and repeatability of the timing of exponential generation, ADC sampling, and RC-time-constant stability are the only limits on the amplifier’s signal-processing performance and precision. In the sample circuit, in which T=14.4 µsec, 1 nsec of amplify-timing error or jitter equates to 0.007% of gain-programming error.