Interrupt-driven keyboard for MCS-51 uses few components
Sandeep M Satav, Indian Institute of Technology, Bombay, India; Edited by Brad Thompson - May 26, 2005
Designers of microcontroller-based products that require a keypad for user data entry can select from dedicating an input line for each key, continuously polling the keypad's x and y lines, or generating an interrupt whenever a user presses a key. Although conceptually simple, dedicating lines to a keypad can tie up most of the microcontroller's I/O resources. Continuously polled keypads can burden the microprocessor's resources and consume excessive amounts of battery power.
The third method, an interrupt-driven keypad, offers several benefits. First, using interrupts frees the microcontroller to perform other tasks or to switch into an idling or power-down mode while awaiting the next key closure. Second, using interrupts helps reduce electromagnetic interference produced by continuously scanning the keypad's lines. Figure 1 shows an interrupt-driven keypad implementation that's based on Atmel's AT89C52 version of the popular MCS-51 family of microcontrollers. Here, the rows of a 16-key keypad, S1 through S16, implemented as a 4×4-key matrix connect to the lower nibble (P1.0 to P1.3) of IC1's Port 1. The keypad's columns connect to IC1's Port 1 upper nibble (P1.4 to P1.7) and a network of four diodes (D1 through D4 and a 10-kΩ resistor, R9. The junction of R9 and the diodes' anodes connects to Port Pin 3.2 and generates an interrupt whenever the user presses a key.
Initially, Port 1's lower nibble sits high at logic one, and the upper nibble is grounded at logic zero, applying reverse bias to the diodes and pulling the signal high. Pressing a key applies forward bias to the diode corresponding to that row and causes to go low, generating an external interrupt to the microcontroller. Upon receiving an interrupt and after a 20-msec software-debouncing interval, the microprocessor sequentially reads the row and column lines. Capacitor C1 provides a hardware-based debouncing interval of approximately 25 msec.
In this design, the microcontroller's software returns a binary-formatted input corresponding to the pressed key's number as sensed at Port P1 (P1.0 to P1.3). As the commented assembly-language routine, available here, explains, the software ignores invalid key combinations. Idle and power-down modes available in CHMOS (complementary high-density MOS) versions of the MCS-51 family save power and thus make these microcontrollers ideal choices for battery-operated devices. For example, a 5V, 12-MHz Atmel AT89C52 consumes approximately 25 mA in active mode, 6.5 mA in idle mode, and only 100 µA in power-down mode. Any enabled interrupt can switch the microprocessor from idle to active modes.
However, recovery from power-down mode to active mode normally requires a hardware reset—an apparent limitation of the MCS-51 microcontroller. However, an earlier Design Idea overcomes the problem and allows use of an interrupt-driven keypad even in hardware-reset-based systems (Reference 1).
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