Bridging the new DisplayPort standard
By Abdullah Raouf, Pericom - July 10, 2008
VESA (Video Electronics Standards Association) defined the emerging DisplayPort standard as an attractive alternative to digital-display-interface incumbents, such as HDMI (high-definition multimedia interface) and DVI (digital-video interface). As with any new standard, the designers of DisplayPort focused on improving some aspects of HDMI and DVI for certain applications. However, simply being more efficient in some instances is not enough for a new standard to overtake a more established interface. Although DisplayPort may be more practical from a technological and cost perspective for some applications, HDMI is already in use in a wide range of consumer-electronics devices. And, although displays for commercial PCs may migrate quickly to DisplayPort, the need to connect to HDMI-based consumer-electronics devices will result in the need to support multiple interfaces for some time. The challenge for engineers, then, will be in implementing efficient bridging that minimizes the impact on system complexity and cost.
You can divide the reasons for implementing DisplayPort into technological and market factors. Among the technological factors are increased capacity, consolidation of external and internal display interfaces, and smaller connectors. From a marketing perspective, DisplayPort avoids the royalties associated with HDMI, and you can efficiently implement it on smaller process technologies. It also shifts the cost from the display to the video/graphics source.
DisplayPort supports single-lane transfer rates as fast as 2.7 Gbps across as many as four data pairs for a maximum of 10.8 Gbps over a single cable. These features combine with support for color depth as great as 16 bits per color channel to give designers the option of improving image quality in applications that require screen resolution of as much as WQXGA (wide-quad-extended-graphics array), or 2560×1600 pixels, as well as increasing refresh rates to 120 Hz. The DisplayPort interface also carries embedded clock signals and provides a bidirectional auxiliary channel operating at 1 Mbps to enable link management and device control to comply with VESA’s EDID (extended-display-identification) and MCCS (monitor-control-command-set) standards. This bidirectional signal allows the display to request stronger signal quality if the received signal has too much jitter or ISI (intersymbol interference). This unique design scheme allows for automatically adjusting pre-emphasis from the source. The direct-feedback path between the display and the source also allows systems to automatically fine-tune themselves for different resolutions, refresh rates, and color depths. It also provides head room to support the continued innovation that video and gaming applications drive.
With its high bandwidth, embedded clock, and adaptive-pre-emphasis capabilities, DisplayPort can also replace internal display buses, such as the LVDS (low-voltage-differential-signaling) interfaces within notebook PCs. In addition, DisplayPort has significantly smaller connectors and channels than those of conventional LVDS-based display interfaces. For example, including the differential auxiliary channel, a one-lane DisplayPort interface uses only four wires, and a full-bandwidth, four-lane interface requires only 10. In comparison, TMDS (transition-minimized-differential-signaling)-based laptops using an 18-bit panel use a 16-line LVDS interface comprising six differential data lines and two differential clock lines, whereas 24-bit LCD panels require 20 lines.
The primary drivers for DisplayPort, in many cases, are market-based. HDMI, for example, has had sufficient time to establish itself as the digital-display interface of choice within a variety of consumer-electronics applications. To compete with HDMI and DVI, DisplayPort must provide significant benefit to trigger migration. DisplayPort attempts to lower display-interface costs in a number of ways. First, it avoids the royalties associated with HDMI standards. DisplayPort also consolidates drive circuitry within the video source using direct-drive technology similar to the technology that the original VGA (video-graphics-array) interface used. Through direct drive, DisplayPort technology eliminates the need for scaling circuitry within the monitor that costs approximately $5 to $10. As a display’s PCB (printed-circuit board) is one of the limiting factors in determining its overall depth, the elimination of scaling enables the production of monitors as thin as ½ in. This feature is a key differentiator with consumers. This shifting of cost is of interest in the corporate-PC market because the higher-priced item, the PC, must absorb the scaling cost. In contrast, in the consumer-electronics market, the more expensive monitor absorbs the cost, and the DVD players and cameras are less expensive.
On the PC side, primary manufacturers of graphics-chip sets are driving the adoption of DisplayPort. These manufacturers include Intel, AMD, and Nvidia, each of which is developing DisplayPort-based silicon. Video processing is a computationally intensive activity, and silicon vendors continue to drive down die size to minimize current consumption and increase transistor count and clock rate. However, as designers move to 45-nm and smaller processes, the inherent limitations of the process technology have a greater influence on system architecture.
For example, moving to a 45-nm process imposes a 2.5V maximum for I/O transistors. Both HDMI and DVI employ TMDS technology, so they require 3.6V when running high-speed signals and as much as 5.25V for low-speed sideband signaling. As a result, you cannot integrate TMDS-based interfaces into ICs using 45-nm-process technology without also introducing specialized and proprietary design measures that increase die size, complexity, and cost. Additionally, any expenses you incur in enabling the use of higher-voltage transistors will increase the cost of not only the electrical portion of the TMDS interface, but also the graphics-chip set onto which you integrate it. High-speed DisplayPort electrical signals, in contrast, never rise higher than 2V, so you can implement them in a standard 45-nm process without requiring special measures or introducing new architectural limitations. This characteristic plays an important role in implementing efficient bridging between HDMI/DVI and DisplayPort.
Whenever new standards are in a position to compete, it can be difficult to determine which, if any, will eventually dominate the market. Although applications exist for which DisplayPort can provide higher quality or bring significant cost savings to bear, engineers must balance these features against the market reach of HDMI and DVI. The life cycle of interface migration has many precedents. For example, when PCIe (peripheral-component interconnect express) first appeared on the scene, AGP (accelerated graphics port) was the dominant graphics-board interface, and graphics chips came with AGP interfaces. To connect their designs to PCIe-based devices, engineers used AGP-to-PCIe bridges. As PCIe gained dominance, it became the native interface, and PCIe-to-AGP bridges emerged.
As DisplayPort reaches the market for graphics-chip sets moving to 45-nm processes and, consequently, native DisplayPort interfaces, engineers will need a way to bridge to HDMI and DVI. However, even if a system uses a native DisplayPort monitor, it will most likely need to also support the HDMI and DVI interfaces of the consumer-electronics devices to which users want to connect. Because interfaces comprise both physical and logical components, engineers can design efficient bridging that separately implements each component in the most cost-effective process technology, depending on the IC within which you integrate it. From a physical standpoint, you implement the high-voltage-I/O transistors that generate HDMI and DVI electrical signaling in a 0.25-micron process. Because logical TMDS-interface processing does not carry the I/O-transistor limitations of its electrical signaling, you can seamlessly integrate it onto a processor without adversely affecting the choice of process technology or cost.
For this reason, graphics-chip-set designers directly implement HDMI- and DVI-protocol processing and a full DisplayPort interface onto their chips to facilitate the most efficient bridging. In this architecture, you use an internal multiplexer to select the appropriate logical protocol, and a DisplayPort electrical signal transmits it (Figure 1). For a native DisplayPort monitor, the graphics-chip set outputs a DisplayPort electrical signal with the DisplayPort logical protocol. To connect to an HDMI or a DVI monitor, the chip set still outputs a DisplayPort electrical signal. However, the signal now encapsulates the appropriate HMDI or DVI protocol, which you convert by using an external bridge. This approach is attractive because it balances signal integrity, complexity, and cost. Engineers could use a full external bridge between the PC and the monitor. This technique increases overall cost and signal latency, however, because it requires additional circuitry to process and convert both the physical and the logical DisplayPort protocol to HMDI or DVI rather than just the electrical signaling. By implementing HDMI- and DVI-protocol processing on the graphics-chip set, engineers can achieve optimal performance with minimal latency at the lowest cost. Additionally, the bridge—actually, a half-bridge—is necessary only when a non-DisplayPort monitor is in use. As a result, you need to make no major architectural changes to system architectures or graphics-chip sets if a market completes the transition to DisplayPort and thus avoids the associated re-engineering delays and costs.
Engineers have several options for how to implement the external DisplayPort-to-HDMI/DVI bridge, each of which has a different impact on signal quality. For example, they can place the bridge directly on the system board, within a docking station, on a cable adapter, or within the monitor itself. Again, implementing full bridging in the graphics-chip set is not feasible because of 45-nm-process-technology limitations.
On-system-board bridging extends the most reliability because it reduces the number of connectors over which the signal must pass. This approach is also passive, meaning that the supported display interface is fixed, and its primary disadvantage is that the system can support only one display interface—HDMI, DVI, or DisplayPort—but not all of them. The alternative is to support multiple interfaces, each with its own port, but this approach introduces substantial complexity and cost to the main system without enough corresponding benefit.
Implementing bridging in a cable adapter, on the other hand, provides the most flexibility, enabling systems to connect to both HDMI/DVI-based monitors and DisplayPort-based monitors. Of the four options, bridging within a docking station has the most limitations. Because relatively few laptop-computer users employ docking stations, it is likely more cost-effective for docking-station OEMs to provide a DisplayPort dongle than to integrate internal bridging. Bridging within the monitor itself is unreasonable because a bridged interface is more expensive than a native implementation.
Signal quality and ESD
Bridges present an opportunity to improve signal quality through a variety of well-established signal-enhancement techniques. When the bridge receives a signal, it can employ equalization to eliminate jitter sources, depending on the distance and number of connectors between the bridge and the video/graphics-chip set. When transmitting the converted signal, the bridge can add pre-emphasis to the signal to anticipate losses on the path to the monitor.
The impact of signal enhancement can be significant. Figure 2 shows a signal with a completely closed eye. Passing through jitter-elimination circuitry restores the quality of the signal. Because you can adjust signal enhancement to meet your application’s characteristics, signal-path distance and number of connectors become less of a concern with an electrical bridge. Rather than minimizing chip-set-to-connector distances, system engineers have more freedom in graphics-chip-set and connector placement, leading to simplified board design and layout.
In addition to maintaining signal quality, it is important for engineers to protect interfaces connecting to the real world from ESD (electrostatic discharge). The HDMI standard, Revision 1.3, for example, requires 8000V protection at the interface connector. Currently, it is uncertain whether designers can cost-effectively implement 8000V ESD protection in a 45-nm-process technology. In any case, it is not feasible to integrate ESD protection onto a graphics-chip set as doing so would leave the chip set vulnerable if the ESD circuit failed, potentially leading to complete PC-system failure. If it is not economically feasible to repair the problem by replacing the damaged IC or processor, you may need to scrap the entire system. For this reason, designers often implement ESD protection as a discrete device, which is more cost-effective to replace in the case of an ESD failure.
Each passive component in the signal chain, however, not only adds to system cost, but also introduces unwanted capacitance and distortion to any signals it passes through. By integrating ESD protection and bridging circuitry, you can minimize the number of ICs in the signal path. ESD circuitry is also a well-established technology at the 0.25-micron-process technology, which HDMI and DVI bridges currently use. Although such an integrated bridge absorbs the cost of the ESD-protection circuitry better than a discrete approach does, the primary advantage is improved signal quality. A discrete ESD device would interfere with any signal pre-emphasis that the signal source adds. A combined bridge/ESD device, however, not only allows you to implement the pre-emphasis circuitry before the ESD circuitry, but also eliminates the circuit losses and jitter a discrete implementation would introduce. If ESD-protection circuitry fails, it causes only the interface bridge—not the entire system—to fail. Additionally, when your design no longer requires bridging circuitry, you can replace the integrated bridge with a stand-alone ESD device, lowering system cost.
Although it is uncertain whether DisplayPort has what it takes to dislodge HDMI or DVI, DisplayPort is working its way into the PC market. Its extensibility to support new applications and internal chip-to-chip-communication capabilities should extend its reach into other applications that can benefit from its technological and cost optimizations. These applications include digital TV and media gateways aggregating multiple video sources, such as DVD players and computers, over home networks to projection and flat-panel displays.
Today, DisplayPort has wide industry support, including from companies such as Analogix, Dell, Genesis Microchip, Hewlett-Packard, Hosiden Corp, Lenovo, Luxtera, Molex, Parade Technologies, Pericom, Philips, Quantum Data, Samsung, and Tyco Electronics. This year’s Consumer Electronics Show saw numerous demonstrations of PC and consumer-electronics equipment, and retailers are selling DisplayPort-enabled monitors.
For the foreseeable future, DisplayPort, HDMI, and DVI will need to coexist. This coexistence will be either a temporary measure as one displaces the others or a permanent move as the industry expands to encompass them all. By understanding the underlying technologies and limitations behind each interface standard, engineers can implement efficient bridging to bring their customers the most flexibility and value at the lowest cost.