Adding Hysteresis to comparators
My last column ("Designing with comparators," EDN , March 29, 2001, pg 56) discussed basic comparator theory, and this column adds hysteresis to comparators to eliminate multiple switching on the output. Comparators have very high open-loop gain, and, without some type of positive feedback, they have no noise immunity. A slow or dc input signal spends too much time in the comparator threshold, where noise immunity is zero, so any noise on the input signal causes the output voltage to switch almost randomly. Hysteresis is positive feedback that pulls the input signal through the threshold when the output switches, thus preventing multiple switching.
In the circuit in Figure 1, RL (the load resistor) forms a voltage divider with the pullup resistor, R3 ; hence, RL 's value must be much greater than R3 to keep the output voltage high. R1 and R2 are the hysteresis components. When VIN transitions from some value greater than V+ toward some value less than V+ , the output voltage switches from VOUT =VCE 0 to VOUT =VCC –IL R3 VCC . The change in the output voltage establishes a current through R1 , and the voltage drop across R1 increases, causing V+ to increase. The increase in V+ pulls the threshold voltage above the input voltage, preventing multiple switching. The following switching equations assume that R2 >>R3 &&R L .
When VIN >VREF ,
When VINREF ,
The hysteresis voltage is the difference voltage between the equations, or
And, when VCES 0 and R2 >>R1 , you can approximate the hysteresis voltage by
Selecting R1 =10 kW, R2 =200 kW, R3 =2 kW, RL =200 kW, and a TLC39 comparator yields VOUT =4.95V, VCES =0.2V, and a hysteresis voltage of DV+ =0.226V. This hysteresis voltage is unusually large for illustrative purposes. Normally, the amplitude of the noise on the signal determines the hysteresis voltage. A more normal hysteresis voltage is closer to 22.6 mV, and when you increase the value of R2 to 2 MW to reduce the hysteresis, the approximate equation now yields an adequate solution.
Hysteresis prevents multiple switching, but there is no free lunch, because hysteresis introduces a "dead zone" in which the comparator cannot sense an input voltage. The dead zone is the range of voltages within DV+ . It is equal to the hysteresis voltage, and it limits the accuracy of the comparator. If the application is unidirectional (the input-voltage direction to the trip point is always from the same direction), the dead zone does not matter, but, in bidirectional applications, such as ADCs, the dead zone limits the converter's ultimate accuracy. When you want to use a string of comparators as an ADC (a flash converter), the dead zone limits the best accuracy the ADC can have. A 9-bit ADC referenced to 10V full-scale has a least significant bit of 19.5 mV. The hysteresis voltage is 22.6 mV, and this dead zone equates to more than a least significant bit for a 9-bit ADC, so the best ADC this comparator circuit can make has 8-bit accuracy.
Ron Mancini is a staff scientist at Texas Instruments. You can reach him at 1-352-568-1040, firstname.lastname@example.org.