# Simple circuit suits quadrature detection

SL Black and HL Maddox, AT&T Technologies, Columbus, OH -August 17, 2012

Originally published in the August 22, 1985, issue of EDN

The circuit in Figure 1 generates an output voltage that you can measure to determine whether two sine waves have a quadrature relationship. If the output voltage is 0V, the inputs (ϕ1 and ϕ2) are exactly in quadrature. If the inputs are other than 90° out of phase, a dc voltage appears at the circuit’s output. The voltage is proportional to the number of degrees that the input signals are out of quadrature. The polarity of the voltage is positive for phase angles of less than 90° and negative for angles of greater than 90°.

The signals A and B in Figure 2 are in quadrature. When A’s signal is applied to the ϕ1 input, a bilateral CMOS switch turns on during the positive half cycle and turns off during the negative half cycle. If B’s signal is applied to ϕ2 simultaneously, an output similar to that of C appears at pin 2. Note that the areas above and below ground are equal. The integrating network, R5C1 in Figure 1, produces a net voltage of 0V.

If the phase angle is >90°, the area above ground is larger than the area below ground, and the output voltage is positive (D). If the phase angle is <90°, a negative output voltage results (E). If the 4016 triggers at a value other than 0V, the detector’s accuracy will not change.

R3, D1, and D2 provide input protection for the IC. The performance of the R4/R5/C1 integrator depends on the frequency of the input signals and the impedance of the network at pin 1. If you choose 8.2 kΩ for R1 and 2.2 kΩ for R2, the values 8.2Ω, 4.7 kΩ, and 3.2 μF for R4, R5, and C1, respectively, yield good performance at 25 kHz. These values will accommodate a 24V p-p swing at the ϕ2 input. The values of VDD and VSS must be large enough to accommodate the input swings at the 4016. For example, an input swing of ±3V would call for 5V for VDD and −5V for VSS.