Use a transistor and an ammeter to measure inductance

Raju Baddi, Tata Institute of Fundamental Research, Pune, India - April 5, 2012

Bipolar junction transistors transfer a current from a lower-resistance emitter to a higher-resistance collector. You can use this property to measure inductance by connecting a series inductance/resistance circuit in the emitter and biasing on the transistor long enough for the current to reach a maximum value that is at least five LR time constants. When the transistor’s off time is equal to its on time but is still biased by a silicon diode, the LR current decays exponentially toward 0A. Using the transistor’s current-source property, you can measure this current without hindering the decay process in the LR circuit.

The transient analysis of an LR circuit shows that if, during the off time, the LR circuit’s current reduces to a sufficiently low value, say 5% or less, then, for the on time plus the off time, the average current is directly proportional to the value of the inductance. You can control the currents through the transistor and an LR network using timed switching circuitry.

Use a transistor and an ammeter to measure inductance figure 1

In an inductance-measuring circuit (Figure 1), the NE555 connects as an astable multivibrator oscillator to produce a square wave of approximately 50% duty cycle at frequencies of approximately 46 Hz, 230 Hz, 2.3 kHz, and 23 kHz, depending on the position of the range-selector switch. These values correspond to a full-scale inductance- measurement range as high as 2.5H, 500 mH, 50 mH, and 5 mH. This square wave toggles four quad-packaged CD4066 switches alternately through a pair of CD4011 NAND inverters such that, during the on time, S₂ and S₃ are closed when S₁ and S₄ are off, and, during the off time, S₂ and S₃ are open when S₁ and S₄ are on.

At the start of the on time, S₂ and S₃ are closed, biasing Q₁ on from the 5.5V power rail, and the diode and meter disconnect through S₁ and S₄. After the current in the inductor under test, LX, has exponentially reached maximum as the resistance determines, the off-time half of the cycle begins. S₂ and S₃ open to remove the 5.5V bias, and S₁ and S₄ close to insert the meter in the collector-current path and place a small diode-drop bias voltage on the Q₁ base.

Normally, the diode’s bias voltage is a bit too low to keep Q₁ on. As LX maintains the initial current, however, it drives the emitter negative to temporarily keep Q₁ on during the current decay. Most of the exponentially decaying LR current flows through the collector to the meter, and a small portion flows through the base and the bias resistor RB, depending on the Q₁ current gain. The meter responds to the current average over the entire on- and off-time cycle due to the mechanical damping of the meter pointer. In this simple circuit, the meter deflection is directly proportional to inductance. With the values in the figure, the meter indicates approximately fullscale 100 μA when measuring a 5-mH inductor on the 5-mH range selection.

At the end of the off-time, the current through the inductance is almost 0A. This appendix shows the current waveform and additional details, such as accounting for high inductor resistance and meter-scale factor.

Editor's Notes:

The NE555 high output appears slightly lower than the specified valid logic 1 voltage for the CD4011, but is still well above the switching threshold and is driving zero load current.

The meter resistance has not been specified, the author used a moving pointer bench VOM. A digital meter may not work properly unless it has the ability to average a pulsed signal.

Q₁ is biased just below threshold. While the data sheets indicate a 1N4148 diode has typically lower forward voltage drop than the 2N3904 V_BE, there is a possibility that certain combinations of diode and transistor may bias the transistor on during t_OFF and cause additional meter deflection. It might be necessary to hand-pick these components.

Remember to ground any unused input pins on the remainder of the CD4011 quad NAND package.