NAND versus NOR
If you are a handset-chip architect, you have more choices than ever when it comes to picking a memory architecture for your next project. Users can go with tried-and-true methods using NOR for system booting or try their hands at designing a new architecture that boots with two of today's hybridized flash chips: Samsung's OneNAND and M-Systems' mDOC (mobile disk on chip).
The hybridized model promises to eliminate the pricey NOR device for high-end-system booting and to handle storage, too. In demand-paging architectures, it even promises to reduce the amount of RAM needed, thus reducing overall system power and cost.
But opponents say that implementing hybrid architectures is complex and error-prone. Intel, the current leader in the traditional NOR market, claims a system can make only so many "reads" from a NAND before losing data-storage integrity, which can ultimately lead to system failures, especially in demand-paging systems.
Experts say there are pluses and minuses to implementing any of the flash architectures, so users have to find the right balance of target market and user, features, unit cost, and design cost for their next designs.
Today, designers can employ four primary flash-memory architectures: the traditional XIP (execute-in-place) model, the shadow model, the store-and-download model with NAND, and the newer store-and-download model with hybridized NAND.
The XIP model
The XIP model consists of NOR memory and volatile memory, likely DRAM (Figure 1). In the XIP model, the NOR memory executes code, and the volatile memory accounts for constantly changing system elements, such as variables, stack, and heat. In the XIP model, the NOR can also provide data and code storage as well.
"The advantage of the XIP model is simplicity, but the disadvantage is its dismal write speed," says Samsung associate director for flash marketing Don Barnetson. "It takes five seconds to write a new phone number into my cell phone, because NOR has dismal write performance. If you are taking pictures or downloading movies, NOR simply doesn't have the bandwidth to keep up. At best, XIP can move 100 Mbytes of data over the bus."
Advantages of the XIP model are that it is simple and well-understood across multiple system disciplines. So although the cost of NOR is high compared with that of NAND, designing it into a system is easier, thus it typically helps get designs to market faster.
The shadow model
To get around the storage and write-speed issues of the NOR device, some designers—especially those working on higher end phones—employ the shadow model (Figure 2). In this model, users boot a system with NOR and use a NAND for storage (or, in rare cases, a mini hard drive for storage); the volatile memory handles all of the execution.
"On power up, you execute under NOR and almost immediately shadow most of the operating system over to the DRAM, so your operating execution happens back and forth between the application processor and the DRAM," says Barnetson. "The reason being is the DRAM is an order of magnitude faster."
But although the shadow model offers seemingly the best of both sides of the flash coin—easy boot-up and faster read and write with better storage density—it is also expensive in that you are using a relatively pricey NOR only to boot up your system. The architecture is also a bit more complex, which means it consumes more design time or floor costs. The designs also tend to be power-hungry, because the volatile memory is constantly active. You can, however, offer customers richer features.
NAND store and download
To overcome the space issue, which is a huge factor in handheld devices, some design teams employ a store-and-download architecture (Figure 3). This model has no NOR, but there is an OTP (one-time-programmable) or ROM core designed into the main application processor. The processor loads information into the volatile memory (likely DRAM), which accesses a NAND core for data storage.
The architecture is a bit more complex and requires more initial engineering or floor costs, but ultimately, the unit cost of the system is less expensive. The main difficulty of the model is that users must employ extensive error-correction and -detection coding because NAND is typically less reliable. Storing and downloading designs tend to require more power, as the RAM takes a more active role.
Hybrid store and download
To get around the shortcomings of the traditional memory models, memory vendors are now offering hybridized devices. M-Systems and Samsung are the first two companies to offer such products. M-Systems introduced its MLC (multilevel-cell) mDOC EFD (embedded-flash drive) in 2000, and Samsung followed with its SLC (single-level-cell) OneNAND in the second half of 2004.
Both offerings mix SRAM, control logic, and NAND to basically create a best-of-both-worlds device that is supposed to look to the designer like a NOR Flash. But, OneNAND, for example, performs reads much faster than a standard NAND and at the same speed as a NOR device. It also offers better write performance than NOR devices (Table 1). M-Systems' mDOC offers faster write performance than NOR but slower read speed and comes in SLC and MLC configurations (Reference 1). The hybridized version one-ups the traditional store-and-download model by eliminating the OTP block (Figure 4).
OneNAND has a 16-bit NAND interface instead of the standard 8-bit multiplexed interface in storage NAND. OneNAND has 1 kbyte of boot RAM. "Effectively [it copies] the 1 kbyte from the NAND into the SRAM block, and then the processor executes from that SRAM," says Barnetson. "It gives it 1 kbyte, which is just enough for the processor to instruct the OneNAND to load the next boot loader into two other SRAM locations Samsung calls data RAM. The OneNAND has a total 4 kbytes of data RAM."
Barnetson says the second boot loader is much larger; you use it to configure the application processor and begin streaming code into the DRAM. "Depending on the system, which might have one more boot loader, what you end up with is enough of your operating system in the DRAM to fire up your OS," he says. "You don't need the OTP block."
Hybrids require less error-correction and -detection coding than store-and-download models with standard NAND. Most hybrids require single-bit error-detection and -correction coding, but vendors recommend double to be safe. John Nation, marketing manager at Spansion, says that NOR vendors could offer error detection and correction with the devices, but vendors test NOR devices so thoroughly that they don't require that extra step. "Users don't have to spend time worrying about ECC [error-correction coding] with a NOR," says Nation.
But Blain Phelps, director of worldwide marketing at M-Systems, says that error correction and detection of hybrids, or what M-Systems calls EFDs, are well- understood. "EFDs have been around for a while," says Phelps. "Ignorance is no longer an excuse. You either go with one or the other. We know how to work with both of them and integrate both of them. It gets back to cost, performance, and use model."
OneNAND's interface can read and write at 108 Mbytes/sec. Samsung claims that although the NAND hybrids can replace the stand-alone NOR and OTP block in a design, their read and write speed makes them especially well-suited for advanced operating systems using demand paging, which can ultimately reduce the amount of DRAM a system requires. Typically, other flash modes simultaneously load the entire operating system and application.
"In demand paging, you only bring into DRAM the things you need," says Barnetson. "You don't have to load the entire OS and all the applications simultaneously. Because the interface of OneNAND is so fast, if you use it in demand page, that likely means you don't need as much DRAM." Less DRAM, of course, cuts down on the power budget, form factor, and cost.
Not all vendors share the same view. Ed Doller, chief technology officer of Intel's flash group, says there is a huge difference between using NAND in a code environment and using it as a storage medium. "Demand-page systems are extremely complex to design, manage, and test," says Doller. "The minute you start burdening a cellular phone with a demand-paging system, your engineering validation and resources [increase] dramatically."
Doller says he is beginning to see that purchasing departments are starting to apply more pressure on system architects to use the NAND architectures. "None of those architects will say there is a technical reason for switching to NAND in a demand-page, store, and download architecture," says Doller. "Most designers despise it. They would rather be working on phone features than debugging architecture ... The minute you are late to market because you are debugging a demand-paged OS versus getting revenue for those phones, you have a huge problem."
The unit cost for a hybridized NAND is 30 to 40% cheaper than NOR at the same density; stand-alone NAND is slightly less expensive than hybrid NAND.
Although the hybridized-NAND market currently contains only two players, a lot of other players are eyeing it closely. To date, Spansion is the only traditional NOR vendor actively working on a response (nonverbal, that is). The company is currently developing ORNAND, which it bases on its MirrorBit technology and which promises faster write speeds than NOR and faster read speeds than NAND. Spansion expects to ship its first ORNAND devices to customers in 2006.
Meanwhile, Infineon Technologies, which makes NAND, has yet to jump into the market and in part is expecting the market may come to it. Indeed, Eugene Chang, a senior marketing manager for Infineon, believes that hybridized devices will have a short shelf life, because some IP (intellectual-property) vendors will figure out a way to create a controller core that allows users to boot directly from a standard NAND, which is cheaper than a hybridized NAND.
Chang argues that the controller core, unlike an OTP device, would actually facilitate some of the bit switching to speed the NAND read performance, not just wake up the NAND. "It poses a great opportunity for an IP company," says Chang. "If you can create a controller that can be dropped into an ASIC or processor and package it with firmware and a pure NAND interface, [you] could probably make some serious money."
Lane Mason, Denali Software's memory market analyst, notes that Denali offers a OneNAND controller, but he declines to say whether the company is working on a controller to boot from a standard NAND.
Intel, which currently holds a slight lead over Spansion in NOR-market share, is closely watching the NAND market, especially its movement into NOR territory. "Right now, we look at the NAND market and hockey-stick projections and ... at various options to service that market," says Doller. "Over the long term, that option is next-generation memory technology. We are evaluating what makes sense for Intel from a NAND perspective. There hasn't been a strategy meeting here in the last few years about whether or not it makes sense for Intel to be in that business. We continue to evaluate it."
Having a strong play
So although debate continues over which memory architecture is best for your system, there is little doubt that hybridized-NAND devices are indeed making an impact in the high-end mobile-handset market. According to Neta Yacoby, worldwide marketing manager for mobile at M-Systems, six of the seven largest mobile-phone manufacturers in the world use mDOC.
"We see convergence in the mobile-phone market," says Yacoby. "More applications ultimately mean there will be a growing need for more storage, driving the replacement of NOR with NAND."
Meanwhile, Samsung claims to be shipping 2 million OneNAND devices a month. "Two million per month is a very small percentage [compared with NOR], so we have a huge opportunity ahead of us," says Barnetson.
Analysts are still trying to figure out whether hybrids will add more fuel to the blazing NAND market. This year, NAND revenue for the first time in its history surpassed NOR revenue (Table 2). Joseph Unsworth, senior analyst for semiconductor memories at research company Gartner, says that most of that revenue growth came from new markets, such as USB sticks and digital cameras, but some growth—including emerging MP3 players such as Apple Nano—is coming at the expense of the hard-disk-drive market. And growth will continue as NOR declines.
"The NOR market losing value is due in large part to Intel cutting prices on NOR," says Unsworth. He notes that Intel a few years ago irked customers by raising the price of NOR. The high price allowed Spansion, which was late to market with MirrorBit, to grab market share from Intel, which then responded by dropping the price of NOR. That move, says Unsworth, has been the main reason for NOR revenue's decline and NAND revenue passing it for the first time.
"A NOR-market recovery, if indeed it ever recovers, will be further slowed by hybridized vendors cutting into the high-end NOR market. Certainly one of Intel's biggest competitors today is the NAND flash," says Unsworth. "Samsung and M-Systems are competing for their business. Intel has to keep NOR flash pricing aggressive ... to make a convincing argument to keep NOR flash in handsets."
Unsworth is in the process of releasing Gartner's first study on the hybrid flash market and its impact on NOR. He was unable to share any data but did note that future dominant memory systems will depend largely on when full-featured phones become mainstream, whether NOR vendors can keep up with the density requirements for those phones and still turn a profit, and whether the inevitable use of removable storage will usurp embedded data storage.
"In the next few years most of these phones will be able to play music," says Unsworth. "That means that removable slot will become imperative to help people move songs and photos between phones and personal computers and printers and to move the songs to their next cell phones."
Doller notes that the Sony W800 Walkman, one of the more advanced phones, uses NOR for code execution, employs a small amount of embedded NAND, and includes an additional card slot for data storage. "As the 512-Mbit device hits the street, I'd expect the next generation will simply replace that embedded NAND with the NOR but leave that card slot," says Doller.
Doller believes that the market will sway back and forth between using NOR and NAND architectures to boot systems. "Once the NOR gets into a particular lithography, because our die sizes are fundamentally smaller, it ultimately becomes a cheaper solution in terms of floor cost," he says. "In time, the main questions will be: What is that lowest floor cost, and at what density is [it] occurring?"
"There is a suitable architecture for store-and-download phones, and I think some of the high end and more so the mainstream phones are going to stick with the NOR flash because companies like Intel and Spansion will have more aggressive NOR pricing, and it is going to be accompanied by a removeable slot," says Unsworth. "That way, if the consumer wants more storage, they can buy it."
Most believe that mobile-phone-service carriers will at first be reluctant to supplement the cost of phones with removable storage, because the carriers currently make extra revenue from charging customers to store data on their networks. Record companies may also be unhappy about the situation, because they want to charge customers to download a song for each device rather than have them download a song only once onto a storage medium that can play on multiple devices. All agree that over time, the obvious consumer preference for removable-data storage—ultimately promising the ability to move stored music, photos, and video from their mobile handsets to other devices, such as PCs, printers, and new mobile handsets—will likely prevail.
Today, the cutoff at which NAND starts to become more feasible than NOR-based architectures is the 256-Mbit density, but not everyone agrees with that assertion. Samsung, for example, doesn't offer OneNAND with less than 128 Mbits, so it claims 128 Mbits is the point at which a hybridized architecture becomes more feasible; Intel claims that 512 Mbits, the biggest NOR the company offers, is the inflection point.
Doller notes that Intel has to stay at the top of its game. "We clearly need to make sure we move our lithography as fast as humanly possible in that our densities keep up with the sweet spot of the market, because if they don't, we've got a business imperative," says Doller. "We are in a great path for meeting that requirement. It doesn't mean NAND is not going to make its way into handsets. I do fundamentally believe there will be data growth that will outpace at the high end the requirements of a NOR-only solution."
Doller says that ultimately, the industry will require a new flash device. He notes that Intel is in the early stages of a study indicating that NAND has an inherent flaw that makes it ill-suited for booting systems, especially in demand-paging architectures. "NAND inherently has a limit to the amount of times you can read it before you have disturb issues where you start to change the data in the device," says Doller. "I fundamentally believe that the demand-page architecture out of NAND will be problematic for that reason."
According to Doller, Intel took one OEM's platform, engineered around it, and collected data that shows that this particular platform "could be problematic." The real question is whether this problem is isolated, says Doller. "We're currently looking at a completely different OEM handset to try to ascertain if it is a problem there, also." He believes the study will at least show that the number of reads performed in demand paging exceeds the number of reads that testers spec for NAND-based parts.