Abstract: This paper presents a highly linear low power and high gain CMOS common-gate (CG) LNA for UWB receivers. The proposed LNA uses current-reuse, forward-body biasing, and shunt-series peaking techniques. The current-reuse and forward-body biasing techniques are adopted in order to reduce power consumption while achieving reasonable power gain. In addition, the proposed CG architecture LNA with a shunt-series peaking technique can easily obtain wide bandwidth. The proposed LNA circuit is designed and simulated in 0.18µm RF CMOS process. Simulation results of the proposed LNA achieves  from 16.5 to 18.2dB gain (S₂₁) over 3-11GHz bandwidth, a minimum noise figure (NF) of 2.1dB, and an input third order intercept point (IIP3) of 10dBm, while consuming 3.1mW from a 1.3V supply voltage.

1.  Introduction

In February 2002, the Federal Communications commission (FCC) has allocated 7,500 MHz of spectrum for unlicensed use of ultra-wideband devices in the 3.1 to 10.6GHz frequency band[1]. The benefits that UWB technology can provide, including low power, high data rates (up to 1 Gb/s), low cost and reduced interference. Being the first block of the UWB receiver, the UWB low-noise amplifier (LNA) plays a crucial role in amplifying the received signal while adding little noise to it. The UWB LNA must meet several stringent requirements, such as broadband input matching, flat and high power gain , low noise figure(NF), high linearity and low power consumption, which directly affect characteristics of the whole UWB receiver.

Up to now, a number of UWB LNAs based on CMOS technology have been developed in literature[2-8]. The distributed amplifier (DA) is one of the most popular architectures for the wideband LNA design. Because DA LNAs provide good wideband input matching, flat gain over a wide range of frequencies, and generally higher IIP3 [2], [3], [4]. However, the DA LNA consumes a great deal of power, occupies a large chip area, and its power gain is quite low. Resistive feedback is a good solution for obtaining wide bandwidth and flat power gain [5], [6], [7]. However, the use of a resistor in the feedback path reduces the power gain and degrades the noise performance. Recently, a new topology in the LNA design is the cascode with a Chebyshev input matching filter, which provides good wideband input matching and high power gain [8]; however, the noise figure (NF) is degraded by the insertion loss of the filter.

A big challenge for designing UWB LNAs is the stringent linearity requirement over a wide frequency range, due to the large numbers of in-band interferences in UWB system, and the cross-modulation/inter-modulation caused by blockers or transmitter leakage [9] in a reconfigurable receiver. Furthermore, while transit frequency(f_T) increases with technology scaling, linearity worsens due to lower supply voltage and high-field mobility effects[9]. Therefore, wideband linearization technique is a research hotspot. A linearization approach for high-frequency wideband applications is desired. Up to now, several techniques have been proposed to improve the linearity of LNA circuit. The optimal biasing technique [10], [11], which optimizing the overdrive voltage(V_gs-V_th), can be used to achieve a peak in IIP3. However, the bias voltage range for IIP3 peak is very narrow, making the linearity boosting very sensitive to process variation. The derivative super-position(DS) method [12-14] uses an additional transistor’s nonlinearity to cancel that of the main device; it involves MOS transistors working in triode [12] or weak inversion region [13], [14]; therefore, the DS method is difficult to match the transistors working in different regions, resulting in a linearity improvement highly sensitive to pressure-volume-temperature (PVT) variations. The body biasing technique [15] is suitable to improve the linearity performance, however, it degrades the gain and noise performances. In [16], the post-distortion technique is utilized to improve the linearity. Owing to all transistors in saturation region and also avoids the input matching degradation; this technique has a robust increase of linearity.

     In this paper, a highly linear, low power UWB CG-LNA is proposed. Common-gate (CG)  LNAs have become more and more popular for UWB systems thanks to their simpler input matching network, better linearity, lower power consumption and better input-output isolation compared with common-source (CS) LNAs. However, as we all know, the power gain of the CG LNA is insufficient [17], so a CS amplifier is utilized as a second stage. The proposed LNA circuit utilizes current-reuse and forward body biasing techniques in order to achieve low power consumption. In addition, shunt-series peaking techniques are used to extend the 3dB frequency bandwidth. Meanwhile, a post-distortion technique is employed to improve the linearity performance of the proposed LNA.

       This paper is organized as follows. Section 2 begins with input stage analysis of LNAs and compares the pros and cons of conventional CS and CG topologies. The techniques, which employed to the proposed LNA, are also described carefully in section 2. Section 3 presents the final schematic of the proposed LNA, a gain analysis, a noise analysis, a linearity analysis. Simulation results are shown and compared with other reported LNAs in section 4. Finally, concluding remarks are provided in section 5.