UBM Tech

# Circuit eases power-sequence testing

Goh Ban Hok, Infineon Technologies Asia Pacific Ltd, Singapore; Edited by Martin Rowe and Fran Granville - July 9, 2009

Systems on chip (SOCs) normally require one power supply for the core and another for I/O. To properly apply power to the device, you often need one supply to apply power before the other. The circuit in Figure 1 lets you test the power sequencing of the SOC. Two TPS75501 linear regulators, IC3 and IC4, generate two power supplies. The TPS75501 adjustable regulator provides output voltages of 1.22 to 5V from a maximum input of 6V. The circuit uses 5V as the input source, and it can supply as much as 5A. The SOC requires 3.3 and 1.5V. The following equations describe how to set the voltages. VOUT1=VREF (1+R4/R5) for IC3, and VOUT2=VREF(1+R6/R7) for IC4. The reference voltage is 1.22V.

In the circuit, R5 and R7 are 30 kΩ. Variable resistor R4 is 7 kΩ for the 1.5V supply, and R6 is 50 kΩ for the 3.3V supply. Green LED D2 lights when the 3.3V supply is present, and red LED D1 lights for the input-supply voltage. Pin 1 of the TPS75501 is the enable pin. When low, it enables the output voltage at Pin 4. Switch S2 selects the sequence of the power supplies. IC1 is a 555 timer operating as a monostable circuit. It provides the delay between the two power supplies. You can adjust the delay by using the time constant of R3 and C3: Delay=1.1×R3C3.

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C3 is 33 µF and R3 is 11 kΩ for a 400-msec delay between powering the two supplies. The timer triggers with a negative pulse at Pin 2 of IC1. It produces a positive pulse at Pin 3 of IC1. The output becomes inverted at IC2A before passing to IC6’s Pin 11. IC5 and IC6 are the latched circuits. The set pin, S, connects to the 5V supply, and the reset pin, R, connects through resistors R2 and R10 and capacitors C4 and C7 to ensure that the Q output is high during the initial power-up stage. Regulators IC3 and IC4 are initially off.

When analog switch S2 is in the on position, the sequence of the 1.5V power supply starts first, and the 3.3V supply follows. To start the power-sequence testing, press and release trigger switch S1 to momentarily produce a low pulse. This pulse triggers the 555 timer, IC1, which produces a positive pulse. This pulse in turn produces a delay before enabling IC4’s power 3.3V supply. When you press and release S1, another signal goes to inverter IC2B before passing to the latch pin, Pin 3 of IC5. There is no delay for the 1.5V regulator that connects to this pin. It enables IC3’s 1.5V power supply. Because IC3’s enable pin immediately receives the enable signal, it produces the 1.5V without delay. IC4’s enable pin, which receives a signal after the delay by the 555 timer, later produces the 3.3V, thus achieving the power sequence. The 1.5V power supply comes first when you press S1, and the 3.3V power supply comes on only after the 555 timer delay (figure 2 and figure 3).

Switch S2 connects to pins 13 and 16. When S2 is off, the power sequence changes. In this case, the 3.3V supply powers up first, and the 1.5V supply follows (figure 4 and figure 5). When you press S1, the 3.3V power supply comes first, and the 1.5V supply follows after the 555 timer delay.

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