How to control analog output from a CPLD using a pulse width modulator

Rafael Camarota, Altera -February 24, 2009

Although the Altera MAX IIZ CPLD is a digital programmable logic device, it is versatile enough to control analog systems. This article shows how MAX IIZ CPLDs – alone or with a few passive components – can replace digital-to-analog converters, thereby allowing them to drive devices like audio speakers or control things like LED intensity, motor speed, and servo position. The article also explains pulse-width modulator (PWM) operation, as well as describing the efficient implementation and use of PWMs in a MAX IIZ CPLD.

A pulse-width modulator (PWM) is a common way of generating analog outputs from a digital component. A PWM replaces a digital-to-analog converter (DAC) that generates analog voltage or current proportional to the digital input. As the name implies, a PWM generates a series of constant voltage or current digital pulses with pulse widths or duty cycles that are proportional to the intended analog strength. The series of modulated pulses can be converted to an analog voltage with a low-pass filter, but this is usually not necessary.

Fig 1 shows a typical analog signal and its corresponding digital PWM representation. In general, an analog signal has maximum amplitude, minimum amplitude, and many levels in between. In contrast, the PWM only has two levels: maximum and minimum.

1. Analog signal and equivalent pulse-width modulation.
(Click this image to view a larger, more detailed version)

To convert from analog to digital, the analog signal first is sampled at a carrier frequency. For a given sample period, the area under the analog signal equals the area under the PWM pulse. The key principle behind the PWM is that a short pulse at maximum amplitude has the energy equivalent to a continuous analog signal at a lower amplitude. This simple equation determines the required sample frequency for a PWM circuit:


...where FSAMPLE is the rate at which the analog signal is divided into digital packets, and FRANGE is maximum frequency of the analog signal to be reproduced by the PWM. In the case of audio, for example, this may be 4 KHz for a phone or 20 KHz for an MP3 player. The "2" in the equation comes from the Nyquist frequency, which is the accepted oversampling rate required to reproduce an analog signal from digital samples.

The next step is to generate a clock to drive the PWM granularity. The following equation determines the PWM frequency:


...where FPWM is the clock frequency driving the PWM block, and R is the resolution. The resolution is typically a multiple of 2N (where N = number of bits in the digital data stream words), however with the proposed MAX IIZ PWM, any resolution is possible.

PWM analog output applications
The three most useful analog applications for MAX IIZ PWMs are an LED driver, audio output, and motor control. These allow the CPLD to control light, sound, and motion for the following functions:

  • Light
    • Control LED blink intensity to save power
    • Display back-light intensity
    • Tri-color LED color mixing
  • Sound
    • Audio play back
    • Audible warning messages
    • Ringtones and sound effects
    • Keyboard clicks and tones
  • Motion
    • Motors
      – Phone vibrators
      – Game motion feedback
      – Warning vibrations for controls
      – Cooling fan control
      Keyboard tactile feedback
    • Servos
      – Analog control voltage
      – Digital control pulse

Fig 2 shows that it is easy to connect the CPLD to an LED, speaker, or motor. Typically, a minimal number of external components are required. One misconception about PWM outputs is that they must go through some type of filter to convert the digital signal back to analog before it can be used. In the following examples, only the analog servo motor requires a filter.

2. Circuits for converting the PWM signal to light, sound, and motion.
(Click this image to view a larger, more detailed version)

Light: A PWM controlling the light intensity is perhaps the simplest function. The human eye cannot detect a light flashing faster than 240 Hz (a period of 4.2 mS), yet it can distinguish thousands of levels of brightness. The percentage of time an LED is on during the 4.2 mS can be as small as 0.01%, or 4.2 µS, and the light still will be seen as dim but not blinking. At 50% of the duty cycle, or 2.1 mS, it is seen as half intensity, and at 100% duty cycle, it is seen as full intensity. A current-limiting resistor prevents the full intensity output from damaging the LED or the MAX IIZ I/O buffer. The CPLD has an 8-mA I/O current setting that limits the output current and may eliminate a resistor from the bill of materials (BOM).

Motors: MAX IIZ CPLDs can drive some motors directly. Some micro-vibration motors have maximum stall currents and operation currents that are less then 100 mA, and it is possible to drive multiple adjacent outputs with a common PWM signal. For example, a micro-vibration motor has a maximum current of 95 mA. Each I/O is rated for 16-mA drive. Therefore, six open-drain I/Os working together can drive the motor without damaging the CPLD.

The motor-drive circuit has two Schottky diodes to power and ground. These diodes are normally reverse-biased, but will clamp any overshoot or undershoot voltage spikes generated from the motor coil when power is removed or the motor is running after the controller is powered down. Fig 2 also shows how to hook up a more powerful motor using a metal-oxide-semiconductor field-effect transistor (MOSFET) device. The gate of the MOSFET has a pull-down resistor that keeps the motor off during the board's power-up and power-down cycles.


Loading comments...

Write a Comment

To comment please Log In

Currently no items