DesignCon Preview: Exhibitors plan demos and training for attendees
Booth #: 200
Harwin offers RFI shield clips and cans, spring contacts, cable clips, test points, jumper links and their new removable shorting links. These pick and place solutions, known as EZ-BoardWare, are surface-mount designs, available in tape and reel for fully automated assembly. Harwin also provides interconnects with screw machined contacts, including the award-winning Gecko, Datamate and M300 series with ranges from 1.25mm to 3mm and current ratings from 2.0A to 10A. Harwin Mix-Tek connectors are also available with 40A power contacts. Harwin invites you to stop by their booth for more information, as well as an overview of their 1.27mm pitch Archer range, available in a variety of board-to-board configurations with IDC options.
Bellwether Electronic Corporation
Booth #: 653
A provider of high-speed and high-power connectors, stop by Booth 653 to check out Bellwether’s selection of Pogo pins and FFC cables that meet USB 3.0/3.1 signal integrity requirements, as well as wire-to-board connectors providing four-direction wrenching strength resistance.
Booth # 743
Tektronix will be demonstrating our their 70 GHz Performance Scope with patented ATI Technology. They will also feature PAM4 solutions, PCIe 4.0 and SDLA at their booth on the expo floor. Additionally, Tektronix is presenting numerous papers throughout the conference, including the Wednesday Keynote Address by Tektronix President, Pat Byrne, entitled, “Reduce Time to Market with Better Workflow Integration from Simulation to Test.”
Tektronix employees will also be participating in these sessions:
- January 19, 4:45pm – 6:00pm | The Case of the Closing Eye – Resolving 25GB/SEC Design Challenges
- January 20, 8:30am – 9:10am | PAM4 for 400 GBPS: Acquisition, Measurement and Signal Analysis
- January 20, 9:20am – 10:00am | Techniques for Improved Debugging of 100Gb Ethernet using a Modern Oscilloscope
- January 20, 2:00pm – 2:40pm | Jitter, Noise Analysis and BER Synthesis on PAM4 Signals on 400 GBPS Communication Links
- January 20, 2:00pm – 2:40pm | Learn How to Turn Simulation into Reality for PAM4 Analysis
- January 20, 2:50pm – 3:30pm | Multiport, Asymmetric Fixture Characterization by Custom Calibration Kit
- January 20, 3:45pm – 5:00pm | Optics vs. Copper for In-Chassis Connections @ 56-0112GBPS: Is Copper Still a Viable Solution?
- January 21, 2:50pm -3:30pm | Clock Recovery for Signals with Spread Spectrum Clock Through Lossy Channels
- January 21, 3:45pm – 5:00pm | PAM4: New Measurements are Coming
- January 21, 3:45pm -5:00pm | The Challenges of Measuring PAM4 Signals
Booth #: 811
TE Connectivity will be presenting eight demos highlighting performance and next-gen solutions for data centers at Booth 811.
Featured demos include:
• Coolbit mid-board optic (MBO) module demonstration, which includes 10.8 TB packaging density in 1RU, greatly improving I/O densities compared with conventional front panel pluggables.
• Micro QSFP (μQSFP) and QSFP copper connectors, which enable a 10 TB switch in 1RU with cooling capable of single mode optics.
• STRADA Whisper and QSFP copper connectors, featuring multiple solutions from one Whisper family with DPO, mezzanine, cables, and traditional configurations.
Additional demos include:
• STRADA Whisper cable connectors
• High speed mezzanine and STRADA Whisper connectors
• μQSFP thermal demonstration
• μQSFP cable assembly demonstration
• Sliver Internal Interconnect Cabled Connectors
Booth #: 935
Celebrating 20 years in the design industry, SiSoft will offer demonstrations of their Quantum Channel Designer (QCD) and Quantum-SI (QSI) in the Expo Hall.
The Quantum Channel Designer (QCD) enables IBIS-AMI simulations for high-speed serial channel design and analysis. QCD uniquely supports interactive exploration of large pre-route design spaces and automates post-route analysis, using real-time PCB extraction and an embedded via solver. Capabilities demonstrated will include:
• PAM4 and 56 Gb/s analysis – including full support for the latest IBIS-AMI models and advanced simulation results processing to extract key performance metrics.
• Tx/Rx Co-Optimization – automatically finding the right combination of TX and RX equalization settings to maximize design margin, without requiring an exhaustive “blind sweep” of model parameters. This feature makes individual optimization of each channel in a large system design practical.
• S-Parameter Checklist – comparing S-parameter behavior in different domains and leveraging designer intuition to identify problems that can affect IBIS-AMI simulation results. This includes performing targeted corrections to model data.
• IBIS-AMI Model Generation – driving IBIS-AMI model generation from MathWorks’ Simulink
• Data Management/Results visualization – interactively mining results from thousands of simulation cases to identify design trends, then drilling down into selected cases to isolate root cause effects
The Quantum-SI (QSI) automates high-speed parallel interface signal integrity and timing analysis. QSI performs post-route SI and timing analysis of entire interfaces, automatically identifying the correct simulation setup for each net class. QSI allows PCB designs to be imported from multiple CAD systems and includes a PCB viewer that cross-links simulation results to the physical design. Capabilities demonstrated will include:
• Automated post-route analysis – real-time mapping, layout extraction, simulation and results processing to determine design voltage and timing margins
• Analyzing DDR4 with AMI –using IBIS-AMI models for equalization behaviors associated with today’s high-speed memory
SiSoft presentations at DesignCon 2016:
- January 20, 9:20am - 10:00am | A SerDes Balancing Act: Co-Optimizing TX and RX Equalization Settings to Maximize Margin
- January 20, 11:05am - 11:45am | New SI Techniques for Large System Performance Tuning
- January 20, 3:45pm - 5:00pm | Accurate AMI Analysis – Whose Responsibility Is It?
- January 21, 3:45pm - 5:00pm | PAM4: New Measurements are Coming