How to power automated test equipment
Moreover, early DC/DC converters were expensive, bulky, noisy, and unfamiliar to power designers.
As instrumentation card requirements grew in terms of count and diversification of channels and loads, distributed power architectures became a necessary choice (see Figure 1). A simpler, central “bulk” power device supplied a single regulated higher DC voltage, typically 48V, to a backplane distribution system. Test cards devoted some of their area to DC/DC converters, typically on their periphery, whose outputs closely matched the measurement circuits’ needs.
Test circuitry today requires more power to operate and voltage/current requirements span a wide range. At the same time, test instrumentation requires not just power, but also the ability to accurately and quickly modulate various voltage rails in order to completely characterize a DUT’s analog partitions. The power system becomes a key portion of the ATE, driven by increasing performance and density of VLSI or SOC state-of-the art designs.
The “higher density,” “higher dynamic” trend also is challenging at voltages in the 48V range, as higher current requires larger copper cross section within densely populated boards. Some new concepts are being explored today, including factorized power architecture and 400V DC distribution.
Next, we’ll analyze how instrumentation cards and DUTs requirements affect the power distribution architecture within an ATE system, and the main design parameters that need to be considered to optimize the distribution network within an ATE rack, among various instrumentation cards and up to the measurement circuitry.
Power distribution network design considerations
In fact, central power has been abandoned for quite some time and distributed power with backplane distribution approach is standard practice today (see Figure 2). The telecom and datacom industries have been using this approach for a long time, and in many aspects face the same challenges as a modern ATE. Actually, a good portion of the silicon chips that ATEs need to verify and characterize are implemented in telecommunication systems, computing and routing systems that the telecom industry utilizes to move ever-increasing volumes of wired and wireless data around the world. The most striking similarity between the two “worlds” is the need for dense and granular power systems, although with different objectives: throughput and flexibility for ATEs, total-cost-of-ownership (TCO) for telecom and datacom systems.
Design considerations from a system perspective
Bill of Material
Objective: to minimize bills of material
Power distribution bills of material are directly affected by one main parameter: backplane distribution voltage. The simple consideration of distribution losses should drive the trade-off in choosing copper cross section. The primary concern for ATE would be avoiding thermal management issues; therefore, distribution losses should be maintained within a range easily manageable by the existing cooling system. Moreover, if instrument cards need to be hot-plugged, appropriate OR-ing devices should be installed on each card. Table 1 provides a guideline derived from telecom datacenter studies. While ATE requiring more than 20kW are restricted to ATE supporting high degrees of parallel test, it is clear that 48V backplanes may no longer be the best choice, and 400V backplanes with their lower currents are waiting to be exploited once 48V will no longer suffice.
Operating costs, Efficiency and losses, thermal management
Objective: to optimize the thermal management system by controlling distribution losses
Until this point we have focused on backplane distribution. While the management of thermals on the backplane is usually not very difficult, the instrument’s card power system can be quite challenging to control. Moreover, power buses on instrument cards take up “precious real-estate” from the card itself. The most logical choice is therefore to distribute the backplane voltage on the card as close as possible to the actual load, which might be either the measurement circuitry or an on-board DC/DC converter. Obviously, if a low voltage backplane is used -- for example, 12V -- the copper in the PCB would need to be not only properly sized, but also appropriately cooled.
A less obvious aspect is the difficult to accurately compensate for DC (I2R) and AC (L·di/dt) drops as current levels increase. Designers might need to oversize the converter’s powertrains as well as add filtering and decoupling networks as power distribution voltages fall below 48V.
Flexibility and Granularity
Objective: enabling the highest degree of flexibility in test card design and configuration
Instrument cards have an ever-increasing spectrum of loads to supply. Therefore, power systems with granular components provide significant advantages to the designer. An effective approach consists of adopting an intermediate bus architecture, where the backplane voltage is effectively reduced to a lower, “intermediate” bus voltage, then regulated via a standard synchronous-buck point-of-load converter.
Within the flexibility paradigm, re-use of a design has become a common choice to leverage standardization within a diverse power system. Designers can “source and tailor” a multiplicity of regulators from a set of valid designs to electrically fit the specific loads and place them as close as possible to the load themselves to maximize dynamic performance. Clusters of regulators would be supplied by a single intermediate bus and sustained by a bus converter. While good design practice would call for matching the bus converter power throughput with the downstream regulator’s needs, constraints normally arise in effectively distributing the intermediate bus “on board.” At an intermediate bus voltage of 12V, distributing even just 300W means routing 25A, which can be challenging on high-density designs.