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Navigating successful USB 3.0 compliance

& -July 15, 2013

The Universal Serial Bus (commonly known as USB) could have easily been named “the most Ubiquitous Serial Bus.” According to the USB Implementers Forum (USB-IF) , there is an installed base of over 10 billion USB devices, ranging from PCs and smart phones to tablets, monitors, and even wide-screen HD TVs.  The USB-IF ranks as one of the premier electronics device standards organizations with over 700 member companies and thousands of OEM product developers.

USB’s ubiquity and market domination as the de facto interconnect standard can be attributed to the USB-IF’s compliance certification and logo programs.  USB-IF offers a comprehensive set of compliance specifications and checklists covering not only the physical and the protocol layers but also test requirements for specific classes of devices, such as hubs, peripheral devices, and silicon building blocks.  Furthermore, USB-IF holds regular compliance workshops to assure device interoperability testing and specification compliance. Compliance testing can also be performed at the Peripheral Interoperability Lab (PIL) hosted by Specwerkz , or at a network of USB-IF certified independent test labs.

With this broad market opportunity, it should be easy to understand why so many companies want to participate in the USB market segment and associated ecosystem. Navigating the path from revolutionary ideas to market delivery of new USB products often requires both special design skills and supporting hardware and software tools and instrumentation devices.

In this article, we explore important advanced preparations necessary to achieve USB compliance along with several key elements necessary to achieve prompt and effective USB 3.0 time-to-market.

USB 3.0 Technical Overview
USB aims to deliver a seamless connection between a host computer and peripheral devices. The first USB specifications were created in 1996 by a consortium of companies led by Intel.  USB 3.0, also known as SuperSpeed USB, is the latest release of the USB specification.
USB 3.0 is built upon a layered communication architecture.  Key components of this architecture include the physical, link, and protocol layers. (see Figure 1)

Figure 1: USB 3.0 layered architecture

Unlike other serial interconnects that simply use faster bus speeds to increase performance, USB 3.0 creates a dual-bus architecture, using a separate set of signals that support the newer 5 Gbps SuperSpeed signaling while maintaining the legacy 480 Mbps USB 2.0 interface for backward compatibility with older USB peripherals.

The SuperSpeed USB physical layer defines the physical connection of the bus between a host and a device.  It consists of two differential pairs, one on the transmit side and the other on the receive side. USB 3.0 shares similar characteristics found in existing high-speed serial technologies, such as PCI Express and SATA including 8b/10b encoding, data scrambling, polarity inversion, and spread-spectrum clocking.

The link layer is defined to establish and maintain a reliable connection between a host and a device.  USB 3.0 introduces some key concepts including: link commands (used to ensure successful packet transfer), link flow control, and link power management. All of these features are defined by the Link Training and Status State Machine (LTSSM; see Figure 2).


Figure 2: USB 3.0 Link training status state machine (LTSSM)

Finally, the USB 3.0 protocol layer remains similar to its predecessor. Error detection mechanisms are included, including cyclic redundancy check (CRC) fields added to all packets. USB 3.0 also introduces power-saving features. For example, SuperSpeed hosts no longer need to poll an endpoint before initiating a power-state transition. USB 3.0 allows endpoints to asynchronously notify the host when ready, reducing bus traffic and enabling devices to enter lower power states sooner.

These specification elements significantly increase compliance test complexity for products seeking formal USB 3.0 certification.  Some of the key SuperSpeed enhancements found in the latest USB certification process include:
  • Dual-bus architecture with simultaneous 5 Gbps USB SuperSpeed and 480 Mbps High Speed USB data communications.
  • Complex link layer and link state machines (similar to those of PCI Express)
  • Multi-level power management scheme
  • Spread-spectrum clocking support
  • Device power delivery increased from 150mA to 900mA, with new battery charging specification providing 5.0A ports while limiting current draw to 1.5A from any given device
  • SuperSpeed devices can now initiate communications without waiting for the host node to poll devices.
  • New xHCI Hub Compliance Test Suite, requiring Device Enumeration, Attach/Detach, Cold Boot, Warm Boot, Suspend, Hibernate, and Hybrid Sleep tests.
Know Before You Go
USB OEMs should actively consider pre-screening their new designs using the same instruments found at USB-IF plug fests and independent labs.  Selecting the same instrument as suppliers and models can greatly enhance any USB certification pre-screening activity. Investing in test instrumentation might initially appear cost-prohibitive for screening a single OEM USB product. However, the same USB-specific test instrumentation can deliver significant intrinsic value through faster time-to–market obtained via a smaller number of iterations taken with independent USB compliance test labs and the USB-IF sponsored plug fests. Instrumentation investment amortization across a growing product portfolio can far outweigh the costs associated with sole reliance on external certification vehicles.  In short, “Knowing before You Go” ultimately results in far better time-to-market value.

The introduction of SuperSpeed USB and the complexities mentioned above present numerous challenges for those seeking USB 3.0 certification.  Additional testing requirements imposed by USB-IF including new data receiver testing as well as a complex Hub Compliance specification that needs to be met.

The technical complexities of USB3.0 along with the increasingly competitive USB marketplace drive commercial product suppliers to be first to reach the market with full SuperSpeed USB device certification. OEM suppliers and their design teams need to efficiently and properly map their compliance testing process.

There are several venues OEMs can use for USB compliance testing and logo certification including USB-IF sponsored plugfests or one of many USB-IF authorized independent labs. Both of these methods fall short in meeting the rapid “time-to-market” needs of USB OEMs.  Plugfests happen too infrequently for most OEM product development cycles.  Independent test labs used as the primary method of achieving USB certification are often iterative in nature and thus can be quite costly. OEMs are strongly urged to perform extensive pre-screening of their devices prior to entering into one of the public USB compliance test programs.

Test instrumentation manufacturers, such Agilent, Teledyne LeCroy, Tektronix, etc. offer a large selection of compliance solutions specialized for USB certification process.  Table 1 illustrates many of the common test instrumentation solutions available to address all aspects of USB 3.0 compliance.  We found Teledyne LeCroy to offer the broadest level of coverage for USB 3.0 testing.


Table 1: USB 3.0 Compliance Test Solutions

 

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