Power driver design handles difficult loads, helps characterize PSUs

-May 10, 2017

Driving capacitive loads at speed is difficult. The fundamental reason for this is that the current charging due to the voltage change is limited only by the equivalent series resistance (ESR), which tends to be very small for modern multi-layer capacitors. Another reason, if we consider connecting the capacitor to a feedback control system, is phase loss due to a pole introduced by the capacitor. This pole forces us to limit the bandwidth much lower than we would like, avoiding stability loss. So if you are after sharp, controlled edges on your caps, you need a wide-band, high-current “buffer” that doesn’t oscillate and occupy half of your bench. The approach outlined below uses minimum components to fit into a small space with minimal sacrifice of functionality, which is easily added if required. The circuit described here, christened LineEdge2, can produce fast edges at speed while being heavily loaded with both DC and capacitive loads. This device is being used across my company, Dialog Semiconductor, for line transient response, PSRR, and other performance measurements, aiding the characterization of power management ICs.

Modern power management ICs contain a mix of linear and switching converters glued together with a digital core, which can be hardcoded as a big state machine or software-driven with a tiny CPU. All of the regulators are bounded by the specification for the maximum voltage excursion in the event of load or line transient. The typical method of measuring this parameter would require a power amplifier to drive step change into the converter while supplying it at the same time, an electronic load to provide the specified loading at the output and an oscilloscope to measure input conditions and output deviation. The complete setup is outlined in Figure 1.


Figure 1  Line-transient response measurement setup

A simple approach, which many beginner engineers take, is to connect the power amplifier using a coax cable to the target board input capacitance. This capacitance is not tolerated by the power amplifier and in most cases the input side of the regulator turns into an oscillator, which can even cause damage to the input caps or the regulator itself. The usual solution here is to get rid of the coax and use short wires and a series resistor to isolate the capacitive load from the amplifier. This makes it stable, however the isolation resistor doesn’t help with the inaccurate amplitude. It also reduces bandwidth due to the low pass filter created in tandem with input capacitance of the regulator.

Someone could ask: Why can’t you remove the capacitor altogether and just use a power amplifier to drive your DUT? This approach tends to make switching DC-DC converters unstable. Additionally, if the digital core is also supplied from the same source, this can lead to frequent digital core reset, introducing erratic behavior. The compromise here would be to lower the value of the input capacitor enough so that we are still able to drive it and retain the stability of the regulator. This solution, however, requires additional experiments, and that the system being tested has a different hardware configuration than what was originally intended, which is not something desirable from an application or design perspective.

What if I was to design a device with the capability to drive a large capacitive load to start with? It would require a wide bandwidth amplifier and a compensation scheme to account for the phase loss from the load capacitance. After a few experiments with fly wires and prototype PCBs, LineEdge was born, and after a few refinements, LineEdge2.


Figure 2  LineEdge2 schematic

As can be seen in the schematic, LineEdge2 is composed of current feedback amplifier (CFA) U1 (LT1210), a basic biasing network, and the BJT output stage (Q1 and Q2). LT1210 is an interesting amplifier; it features high current output (>1A) and high bandwidth (35 MHz) and by default it was designed to drive “high” capacitive loads – up to 10nF. To effectively use the high current of this amplifier, its output is directly connected to the base of the NPN bipolar transistor Q1. Since LineEdge2 always operates with positive output voltages, this arrangement makes sense. The output stage is made with complementary high switching speed power transistors with hFE of around 50, which gives plenty of current amplification. Additional cooling is attached to the NPN transistor due to the fact that majority of the current actually passes through this element. The PNP is biased by means of two diode drops to push this transistor into conduction with around 10 mA of collector current, making the output stage class AB. The biasing is very simple indeed, as the PNP is only required to be slightly turned on in case of light loading of the output.

With higher load, the output stage turns into class A and the PNP is almost never turned on. To improve the drive of the PNP when speedy edges are required, a bootstrap capacitor is connected in parallel with the biasing diodes. This will provide a reservoir of energy to feed the base only for the short time during the falling edge of the transient. A shorting link is provided to revert to class B output stage in case that device is being used in a low power scenario. The main reason for making the output class AB is to avoid crossover distortions, which can produce additional high frequency noise. Collectors of both transistors are heavily decoupled to provide local energy supply when needed.

Note that there are no emitter resistors in the schematic. These would be beneficial to mitigate risk of thermal runaway for the PNP, but would at the same time increase the amplifier drive swing requirements and possibly the power supply voltage requirements due to the additional voltage drop. To keep the output stage safely away from thermal runaway, the biasing resistor value is set appropriately and the diodes are thermally coupled with the PNP. The total bandwidth of the CFA is slightly reduced by lowering the power consumption with a 100kΩ resistor in series with the SD (shutdown) pin. Compensation for capacitive loasd is really simple. CC is connected in parallel with RC, which sets the bandwidth of the CFA. R5 is an injection resistor, which, together with J9 serves to attach a small rig for stability measurements. The input signal is routed directly to the noninverting high impedance input with optional 50Ω termination.

C5, connected to the CFA’s compensation pin, was left unpopulated as it didn’t improve performance here.

 

Stability

The typical range of capacitive load that is driven by LineEdge2 is between 10 µF and 100 µF. Depending on the type of the capacitor and the amount of capacitive load some fine tuning of the phase margin might be required. Figure 3 shows two extreme capacitive load cases. The gain loss due to capacitive load is obvious and it looks like the impedance profile of the capacitor eats into the expected first order gain roll off. The higher capacitance case has lower resonant frequency and forces the first crossover earlier. The lower capacitance case also has a higher quality factor and shows a sharper valley after crossing at higher frequency. Phase starts to recover at the resonant frequency and quickly jumps to a high value as designed in the amplifier. It is immediately obvious that we have two crossovers and two phase margins. In this case, stability will be dominated by the “weakest link” or the smallest phase margin when all crossovers are taken into account. The weakest link in this scenario will always be the first crossover dictated by the loading capacitor. To make the system stable we have two options, either to somehow boost the gain to avoid first crossover or to boost the phase earlier (at lower frequency) in order to still have some phase at the first crossover. To increase gain just lower the value of RC or to increase the phase boost just increase the CC. Figure 3 shows two cases with fixed value of RC = 560 Ω and two values of CC. It is immediately obvious that the case of 820pF gives better phase margin in both capacitive load cases.

It is worth mentioning the interesting and significant phase margin modulation by the load. Figure 4 depicts a low capacitive load case at different load points. Phase shows very little variation while gain increases. Increase of the gain leads to higher crossover frequency, and since phase is rapidly rising after the crossover, the phase margin is rising as a side effect. It appears that as the load is increased, we’re climbing on the phase boost and at the same time gain and bandwidth are increased. An outcome is that with higher load we have more speed and stability. As visible on the graph, phase margin jumps 10° for a load difference of 400mA.

 

Figure 3  Phase margin plots with 10µF and 100µF capacitive loads

 

Figure 4  Phase margin plots at different load points

Automation

LineEdge2 is a simple device; it doesn’t contain any additional protection or current limiting circuitry. It can be used standalone, or as part of a bigger automation system with many independent supply rails.

Since line transient response is measured at full load, heat dissipation might be a problem. To get around this, a loadload transient pulse is applied synchronously with the line pulse with a proper leading and trailing settling time for the output voltage. This way, loading of the regulator is not constant but rather pulsed with a small duty cycle which reduces the dissipation of the LineEdge and DUT. Figure 5 shows the arrangement of the pulses. The blue trace is the line transient driven with LineEdge2 while the yellow trace is the load transient pulse. The line transient pulse comes in the middle of the load transient pulse with sufficient time margin for the settling of the output voltage – the red trace. Obviously to get to this pulse arrangement, standard bench function generators might not suffice, since the phase synchronization of the two pulses has to be controlled as well as the pulse widths and slopes. The picture also shows excellent pulse fidelity of the LineEdge, as there is almost no crossover distortions, overshoot, or undershoot, and the pulse is a faithful representation of the function generator waveform. By reducing the repetition frequency of the pulse arrangement the total power dissipation is reduced, hence eliminating the need for a heatsink, allowing the solution to remain small and easy to integrate. As can be seen in Figure 5, the line transient response of the regulator is very small (red trace in sync with the line transient pulse) – around 1 mV – and special care should be taken to protect the measurement signal from interference from other noise sources.


Figure 5  Line transient response automation

Hardware

LineEdge2 as implemented comes as a small module ready to be plugged into the target evaluation board. As shown in Figure 6, it connects to the target system using the high-speed, high-current Samtec HSEC8 connector, which can be retrofitted near the input capacitor to allow for LineEdge2 board insertion from the top. It is very important to connect the board close to the input capacitors for several reasons. Firstly, with high static load, since the feedback for the main amplifier is routed locally at the board edge connector, some voltage drop will be visible on the input due to connection resistance. Secondly, more impedance in the connection may limit the speed and capability to charge the capacitors, which results in worse signal fidelity. Usually, we prepare the main board with the connector in place where needed.


Figure 6  Complete setup with retrofitted HSEC8 connector.

 

Conclusion

As application engineers at Dialog, we’re often asked to perform complex measurements and deliver results in a short time. Having the right tools, which you understand and know how to control, gives you an indispensable advantage by greatly reducing the complexity of your tasks. This is the case with LineEdge2, which is widely used by Dialog to help with the measurements and characterization of complex PMICs.


  Download PCB files

Also see:

Mladen Veselic is a Senior Applications Engineer at Dialog Semiconductor.

 

 

Loading comments...

Write a Comment

To comment please Log In

FEATURED RESOURCES